Browse Prior Art Database

LOW POWER SELECTABLE DRIVE OUTPUT BUFFER WITH OVERLAP CURRENT CONTROL

IP.com Disclosure Number: IPCOM000008148D
Original Publication Date: 1997-Jun-01
Included in the Prior Art Database: 2002-May-22
Document File: 1 page(s) / 73K

Publishing Venue

Motorola

Related People

Robert J. Amedeo: AUTHOR [+2]

Abstract

A unique buffer circuitry that selects output drive while controlling the overlap current is designed to address the need to reduce power consumption, operate at low voltage, vary output drive for different output loading, and reduce noise and RPl associated with large output drivers driving lightly loaded outputs. The new circuit is employ- able on virtually any product requiring selectable output drive.

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MO-LA Technical Developments

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LOW POWER SELECTABLE DRIVE OUTPUT BUFFER WITH OVERLAP CURRENT CONTROL

by Robert J. Amedeo and Roberto M. Frontera

  A unique buffer circuitry that selects output drive while controlling the overlap current is designed to address the need to reduce power consumption, operate at low voltage, vary output drive for different output loading, and reduce noise and RPl associated with large output drivers driving lightly loaded outputs. The new circuit is employ- able on virtually any product requiring selectable output drive.

  The main output driver stage is divided into at least two complementary driver pairs (Pl,Nl; P2,N2). In this described embodiment, the driver pair Pl,NI is twice as large as P2,N2 to be able to reduce the drive to one third of the full drive. Other arrangements can be implemented by adding driver pairs and/or varying the size ratios to provide more flexible drive selection.

  The circuit accomplishes drive strength deter- mination using the signal RDRV The RDRV signal, when HIGH, disables the larger driver pair (Pl,Nl), thus providing reduced drive output. In this reduced drive mode, P3 and N3 isolate the core pre-drivers (P4,PS,N4,N5) from the disabled driver pair (Pl,Nl) thus conserving power. When the RDRV signal is LOW, the full drive capability of the out- put buffer is enabled.

  Overlap current is controlled by the pre-driver circuit (core pre-drivers plus reduced drive circuitry). This is achieved by turning OFF the active output driver(s) before turning ON the inactive output driver(s).

  To drive...