Dismiss
InnovationQ will be updated on Sunday, Oct. 22, from 10am ET - noon. You may experience brief service interruptions during that time.
Browse Prior Art Database

Method and device structures for measuring the stress distribution on a chip

IP.com Disclosure Number: IPCOM000008159D
Publication Date: 2002-May-22
Document File: 3 page(s) / 44K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for measuring the stress distribution on a chip. This approach can be used in the development/improvement of packaging technology, for example.

This text was extracted from a Microsoft Word document.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 63% of the total text.

Method and device structures for measuring the stress distribution on a chip

Disclosed is a method for measuring the stress distribution on a chip.   This approach can be used in the development/improvement of packaging technology, for example.

Description

              Mechanical stress changes the resistivity of doped silicon as well as the channel resistivity of MOSFETs due to the piezoresistive effect.  The key elements of the disclosed approach are:

§         A set of transistors to measure the stress tensor at the location of this set. The drawn L and W is small enough so that a reasonable spatial resolution can be achieved and large enough so that L/W=Ldrawn/Wdrawn can be assumed. The choice of transistors depends on which stress components are to be measured:

              -             NMOS, current flow in [110] and  direction (see Figures): sensitive to stress in the horizontal plane (almost isotropic) and in [001] direction

              -             PMOS, current flow in [110] and direction: sensitive to stress in <110> directions (no sensitivity in <100> directions)

              -             NMOS, current flow in [100] and [010] direction: sensitive to stress in the horizontal plane (anisotropic) and in [001] direction

§         Combining these transistors into arrays to measure the spatial distribution of the stress

              Figures 1, 2 and 3 show the sensitivities of the transistor types a, b, and c to mechanical stress in the horizontal plane. The piezoresistivity of n-type silicon in the [110] and  directions under tensile stress is a function of the angle between the stre...