Browse Prior Art Database

Method for Vcc multiplexing

IP.com Disclosure Number: IPCOM000008161D
Publication Date: 2002-May-22
Document File: 2 page(s) / 48K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for VCC multiplexing. Benefits include improved power performance.

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Method for Vcc multiplexing

Disclosed is a method for VCC multiplexing. Benefits include improved power performance.

Background

              No conventional solution exists for multiplexing inputs and reducing input resistance.

              The conventional solution  (see Figure 1) can be implemented using the following steps:

1.      Etch inter-layer dielectric 5 for metal and via

2.      Plate the Cu via and metal

3.      Polish the Cu using the dual-damascene process

4.      Deposit nitride passivation

5.      Spin PI/expose PI/ - Litho

6.      Pad etch

7.      Deposit boundary layer model (BLM)

8.      Pattern C4 opening

9.      Bump plating

10.  BLM etch

Description

              The disclosed method includes structure for reducing input resistance and enabling the increased passage of current through an unchanged number of bumps. The key elements of the method are:

·        An extra layer is added that connects (multiplexes) the VCCs.

·        The extra layer is added using a T-mask layer and an etch of the Al-Ti M7 layer.

              The disclosed method can be implemented using the following steps:

1.      Steps 1-7 as for the conventional solution

2.      Deposit the Al-Ti M7 layer

3.      Pattern with the new multiplex mask that has the VCC strap M7

4.      Etch M7 stopping on PI

5.      Deposit BLM

6.      Pattern C4 opening

7.      Bump plating

8.      BLM etch

 


Advantages

              The disclosed method provides advantages, including:

·        Reduced input resistance

·        Improved power consumption at high speeds

·        Reduced voltage

Fig. 1

               
   

BLM

 
       
     
 
 
   
 

Fig. 2

Disclosed anonymously