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Short Test Time Process Monitor Circuits and the Monitor Data Collection Method in High Volume Manufacturing

IP.com Disclosure Number: IPCOM000008237D
Publication Date: 2002-May-29
Document File: 4 page(s) / 143K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for collecting process monitor data from every dice in High Value Manufacturing (HVM). Benefits include shorter test times.

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Short Test Time Process Monitor Circuits and the Monitor Data Collection Method in High Volume Manufacturing

Disclosed is a method for collecting process monitor data from every dice in High Value Manufacturing (HVM).

Benefits include shorter test times.

Background

Currently, oscillation rings or combinational delay circuits are used to monitor process speed in HVM. However, these methods require a longer test time to read the delay through register, or measure the signal edge. Due to the longer test time, these methods are often used only for design verification and not implemented in production.

General Description

Figure 1 shows the simplified process monitor circuit that enables short test time during HVM. The following outlines how the circuit operates (see Figure 1 and 2):

1.      Enable# signal = 1 by device reset. The counter is set to 011 . . . 11b, osc_stop = 0, n101 = 0, Pad = 1, and the oscillation ring is stopped by Enable# = 1.

2.      The test mode sets the Enable# to 0, to enable the process monitor circuit.

3.      After one cycle of the oscillation ring, the n101 makes a counter increment (100 . . . 00b), then the msb-1 becomes 0 and Pad (msb) becomes 1. The osc_stop remains at 0.

4.      After many loops of the oscillation ring, the msb-1 becomes 1, which makes osc_stop = 1, then oscillation is stopped.

Note. The period of Pad = 0 depends on the process speed. The example of delay difference between fast and slow Fab process is ~500ns.

The following outlines the short test ti...