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A PVD System Design for Improved Deposition Performance

IP.com Disclosure Number: IPCOM000008274D
Original Publication Date: 2002-May-31
Included in the Prior Art Database: 2002-May-31
Document File: 4 page(s) / 64K

Publishing Venue

Motorola

Related People

Da Zhang: INVENTOR

Abstract

Most physical vapor deposition (PVD) systems have a planar target positioned above the wafer. The target is negatively biased to induce ion sputtering and generate deposition precursors. There are two problems associated with the deposition performance in the wafer edge region of such a system. The first problem is the asymmetry of deposited features in the wafer edge region, i.e., the film grown on the trench/via sidewall towards the wafer edge is thicker than that towards the center.

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A PVD System Design for Improved Deposition Performance

Da Zhang

Abstract:

                    Most physical vapor deposition (PVD) systems have a planar target positioned above the wafer.  The target is negatively biased to induce ion sputtering and generate deposition precursors.  There are two problems associated with the deposition performance in the wafer edge region of such a system.  The first problem is the asymmetry of deposited features in the wafer edge region, i.e., the film grown on the trench/via sidewall towards the wafer edge is thicker than that towards the center.  This is because for a wafer edge feature, it sees more target source from the chamber center than from the edge.  The second problem for conventional PVD is lower deposition rate at wafer edge compared to deposition rate at wafer center.  This is due to generally center-peaked plasma ion density and thereby center-peaked target sputtering.

Design of a PVD system consisting of a secondary target in addition to a planar target is hereby invented to mitigate edge deposition problems.  The secondary target has a ring-shape tilting inwards, and it is positioned below the primary planar target.  The size, location, and the tilting angle of the secondary target are designed so that its surface normal direction is facing the edge area of the wafer.  It is connected to a secondary target power source that is independent of the power source for the planar target.  With this design, sputtered materials from the second target provide sources for deposition in the wafer edge region, compensating the initially insufficient deposition source from the primary target.  Since the orientation of sputtered materials from the second target is dominantly directed at the feature sidewall towards the center, compensation for the flux deficiency in the same direction from the planar target is affected.  The design thus provides a symmetric deposition process that is uniform across the wafer.  The configuration of the ring-target can have one or more apertures, and the target power can be a negative dc bias, or a combination of rf and negative dc components.  The target surface can be flat, curve-in, curve-out towards the wafer, or a combination of the above.

Body:

Physical vapor deposition (PVD) is broadly used for depositing materials into micro-scale features.  Examples of PVD applications include the deposition of interconnect barrier or seed metal into trench/via opening structures in the microelectronic fabrication.  For a traditional PVD system, a planar target is positioned on the top of a processing chamber.  The target is connected to a negatively biased power supply.  A gas is supplied into the system, and is ionized to form a plasma by electrical power supplied to the system (mostly also with magnetron enhancement).  The plasma ions are accelerated by the negative bias of the target to bombard the target surface energetically, sputtering away target materials.  The sputtered materials transfer through the chamber and...