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Hybrid DCDC Converter with Improved Conversion Efficiency and Output Regulation

IP.com Disclosure Number: IPCOM000008302D
Publication Date: 2002-Jun-04
Document File: 4 page(s) / 85K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for creating a hybrid DCDC converter. This converter dynamically adjusts supply voltage, reducing voltage to save power during low-performance tasks, and raising voltage for high-performance tasks. Benefits include improved conversion efficiency over a range of different output voltages, and improved output voltage regulation under variable load conditions.

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Hybrid DCDC Converter with Improved Conversion Efficiency and Output Regulation

Disclosed is a method for creating a hybrid DCDC converter. This converter dynamically adjusts supply voltage, reducing voltage to save power during low-performance tasks, and raising voltage for high-performance tasks. Benefits include improved conversion efficiency over a range of different output voltages, and improved output voltage regulation under variable load conditions.

Background

As the number of transistors integrated on chips increases, the chips consume more and more energy from the power supply. Currently, single DCDC converters are used to generate single output voltage from single input voltage (see Figure 1). Figure 2 shows a typical converter operating as a constant voltage source with the zero-load output voltage V2,0. With increasing load current, the output voltage tends to decrease in proportion to the output impedance of the converter. Figure 3 shows dependence of power conversion efficiency of a typical DCDC converter. When internal power losses relative to the output power increase, then efficiency degrades. At low (or zero) load current, output power is small, and power losses are attributed to the quiescent current of the converter. At high load current, output voltage tends to decrease (see Figure 2), and therefore, efficiency tends to degrade. Over a range of load currents, the operating point of a single converter may not locate the point of maximum conversion efficiency.

A single converter needs to be designed for high efficiency and low impedance in order to meet peak load current and output voltage stability requirements. For a single converter, and a constant chip or circuit board area, there is a trade off between conversion efficiency and output impedance. Improved (i.e. higher) conversion efficiency results in degraded (i.e. higher) output impedance.

General Description

The disclosed method proposes a hybrid DCDC converter comprised of multiple DCDC converters sharing the same input and output terminals and supplying current to the same load (see Figure 4). Each conve...