Browse Prior Art Database

THE REFRESHMENT OF RAM FOR PASSWORD CIRCUIT IN SUPPORT CHIP SECURE EEPROM

IP.com Disclosure Number: IPCOM000008325D
Original Publication Date: 1997-Sep-01
Included in the Prior Art Database: 2002-Jun-05
Document File: 1 page(s) / 69K

Publishing Venue

Motorola

Related People

Daniel Tran: AUTHOR [+3]

Abstract

In one currently designed support chip, one part of the password circuit is a six-byte RAM that receives and holds a six-byte password which is transferred from the configuration EEPROM during Power-On-Reset. It is the password from the RAM, not from the configuration EEPROM, that is used to compare with the one entered from the outside device via an on-chip slave SPI. With the current application of the support chip in a pager receiver which rarely fbrces the Power-On-Reset after it is first cold-started with a new battery (only the receiver part of the pager is turned off and on), there is always a risk of losing data in RAM due to ESD.

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MOTOROLA Technical Developments

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THE REFRESHMENT OF RAM FOR PASSWORD CIRCUIT IN SUPPORT CHIP SECURE EEPROM

by Daniel Tran, McClurg George, Zhong Zhong

  In one currently designed support chip, one part of the password circuit is a six-byte RAM that receives and holds a six-byte password which is transferred from the configuration EEPROM during Power-On-Reset. It is the password from the RAM, not from the configuration EEPROM, that is used to compare with the one entered from the outside device via an on-chip slave SPI. With the current application of the support chip in a pager receiver which rarely fbrces the Power-On-Reset after it is first cold-started with a new battery (only the receiver part of the pager is turned off and on), there is always a risk of losing data in RAM due to ESD.

  To access the configuration EEPROM which stores the password, one has to unlock the configu- ration EEPROM by providing a correct password to the password circuit through the SPI, then set a register bit CNF. But if the EEPROM is locked (no password or incorrect password entered), set- ting this bit CNF will also inhibit the internal data from clocking out to the output pin SDO. In other words, when the EEPROM is locked, setting bit CNF will still select internally the configuration EEPROM which stores the non-volatile password, at the same time inhibit data from being exposed to outside world through the SPI by forcing the SD0 output pin low all the time during any read. In othe...