Browse Prior Art Database

MULTIPLIERLESS PROGRAMMABLE DIGITAL GAIN STAGE

IP.com Disclosure Number: IPCOM000008460D
Original Publication Date: 1997-Dec-01
Included in the Prior Art Database: 2002-Jun-17
Document File: 2 page(s) / 86K

Publishing Venue

Motorola

Related People

King Lee: AUTHOR [+3]

Abstract

A basic function in signal processing is to adjust complexity and associated circuit size. Desired the level via a programmable gain stage, producing coefficient values must be maintained in a transla- either attenuation or amplification. Conventional tion table, such as ROM, or complex decoding logic digital multipliers are large both in terms of gate circuitry for each bit of the multiplier.

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MO-LA Technical Developments

MULTIPLIERLESS PROGRAMMABLE DIGITAL GAIN STAGE

by King Lee, Tom Quiroga and Sayfe Kiaie

  A basic function in signal processing is to adjust complexity and associated circuit size. Desired the level via a programmable gain stage, producing coefficient values must be maintained in a transla- either attenuation or amplification. Conventional tion table, such as ROM, or complex decoding logic digital multipliers are large both in terms of gate circuitry for each bit of the multiplier.

Input

Digital

Word

output

b Digital

Word

Attenuation/

Amplification

Coefficient

Fig. 1 Programmable Digital Gain Stage using a Multiplier

  This invention replaces the multiplier with a small number of shift registers, adders and/or sub- tractors to produce a programmable attenuator. The operation of the proposed circuit is based on trans- lating the conventional coefficients to a Canonical Signed Digit (CSD) format. CSD approximates a number by a finite number of sums or differences of powers-of-two terms. Scaling in CSD form can be implemented with simple shift registers, adders, and subtractors.

For example, suppose a signal is to be attenuat- ed by 0.3dB:

  The basic structure for the CSD gain stage is shown in Figure 2. By controlling both the number of shifts to realize different power-of-two terms, as well as the addition/subtraction of the result, the input signal can be scaled. The accuracy of the scaling can be controlled by determining the number of power-of-two terms to be used in the approximation.

  As a reference, an X-bit linear attenuator was designed for determining the accuracy and relative complexity of this system. The input wordlength us...