Browse Prior Art Database

A CLAMPING DEVICE FOR REDUCING RESIDUAL VOLTAGE

IP.com Disclosure Number: IPCOM000008462D
Original Publication Date: 1997-Dec-01
Included in the Prior Art Database: 2002-Jun-17
Document File: 5 page(s) / 231K

Publishing Venue

Motorola

Related People

Michael Heck: AUTHOR [+3]

Abstract

A common problem experienced by electronic systems is when parasitic power from an attached device or accessory inhibits the proper turn-on of the primary system when it is powered down and connected to the device or accessory with active power. A device is described herein which can be added to the primary system and essentially clamps the parasitic power sources to a negligible level, thus allowing proper power up sequencing for the primary device.

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Technical Developments

A CLAMPING DEVICE FOR REDUCING RESIDUAL VOLTAGE

by Michael Heck, Jeff Wingfield and Wayne Ballantyne

ABSTRACT

  A common problem experienced by electronic systems is when parasitic power from an attached device or accessory inhibits the proper turn-on of the primary system when it is powered down and connected to the device or accessory with active power. A device is described herein which can be added to the primary system and essentially clamps the parasitic power sources to a negligible level, thus allowing proper power up sequencing for the primary device.

  A common problem encountered by a battery or AC powered digital sub-system is when the sub- system is connected to an external interface which can provide parasitic power and the primary power source is shut off. In many cases, the parasitic power source will cause the digital power supply in the digital sub-system to stabilize at a non-zero voltage. This in turn can cause problems when the primary power source to the electronic device is re-applied. For example, many digital ICs such as a microcontroller have power-on reset circuitry which will force the device to a known state if the digital supply voltage Vcc crosses a certain low-voltage threshold. The presence of parasitic power may prevent the Vcc from going below this threshold, thus causing the power-on reset circuitry to fail

to re-trigger when the primary power source is re-applied. This can result in improper initialization of the digital IC, and subsequently, the entire digital sub-system. As the normal operating voltages of digital ICs decreases, the threshold for the power-on reset cicuitry would be lowered proportionately. This in turn increases the probability that a parasitic voltage of fixed value can cause problems.

  The internal reset circuit of many microcon- trollers which is responsible for initializing the devices core and peripheral interfaces require that the supply voltage drop below a fixed threshold. Failure of this reset circuitry to trigger can result in the microcontroller entering a state of lockup in which external reset cannot properly initialize the part. In applications where a residual voltage is placed or left on the part prior to normal power-up, this lock-up condition can occur. The residual volt- age left on the part may be due to charge left stored on the supply capacitors or may be due to parasitic leakage currents from an external source (in this example, a personal computers parallel port con- nected to a cellular radio). The path of the leakage current is from the external device's output drivers through input static protection diodes located in IC's on the board containing the controller. This is illustrated by Figure 1.

126 December 1997

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Fig. 1

  This parasitic leakage current creates a residual voltage on the controllers supply and induces the...