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HIGH FREQUENCY, LOW DISTORTION, DIFFERENTIAL TO SINGLE-ENDED BUFFER

IP.com Disclosure Number: IPCOM000008496D
Original Publication Date: 1997-Dec-01
Included in the Prior Art Database: 2002-Jun-18
Document File: 2 page(s) / 72K

Publishing Venue

Motorola

Related People

David Lovelace: AUTHOR [+2]

Abstract

Differential signals are commonly used in inte- grated circuits, but most external signals to an IC are in a single ended form. Several active circuit techniques have been devised to convert signals between differential and single-ended modes, but their gain and linearity performance degrades at higher frequencies. This paper describes a new circuit which converts differential signals to single- ended signals at high frequencies with very little distortion.

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MOTOROLA Technical Developments

HIGH FREQUENCY, LOW DISTORTION, DIFFERENTIAL TO SINGLE-ENDED BUFFER

by David Lovelace and Jeff Durec

  Differential signals are commonly used in inte- grated circuits, but most external signals to an IC are in a single ended form. Several active circuit techniques have been devised to convert signals between differential and single-ended modes, but their gain and linearity performance degrades at higher frequencies. This paper describes a new circuit which converts differential signals to single- ended signals at high frequencies with very little distortion.

  Figure I shows the schematic of a new differen- tial to single-ended buffer circuit, A simple analysis of this circuit, shown in the equations below, demonstrate its basic principle of operation.

Assuming that: RL= m (1)

Since Q3 and Q4 form a current mirror: II = fr (2)

From (2), then VBE~ = VSE~ = VW = Vm (3)

and by definition VIN =y- %= VI - vi (4)

VI = vxLl+ VBM (5)

vi = vm + Voor (6)

Using (5) and (6) it can be shown that:

  Linearity of the buffer is impacted as the load impedance (RL) is lowered. This buffer is capable of maintaining high linearity by increasing the quies- cent operating current when a low impedance load is presented to the output. Figure 2 shows a linearity simulation of this circuit with an output load of 50R. This simulation shows that an input referred third order intercept (11P3) of over 22dBm at high frequencies was achieved. IIP3 was calculated us...