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INCREASING SURFACE MOUNT MOSFET POWER DISSIPATION THROUGH INNOVATIVE PC BOARD PATTERN DESIGNS

IP.com Disclosure Number: IPCOM000008500D
Original Publication Date: 1997-Dec-01
Included in the Prior Art Database: 2002-Jun-18
Document File: 3 page(s) / 207K

Publishing Venue

Motorola

Related People

Chandler Wade: AUTHOR [+2]

Abstract

The advent of surface mount packages has resulted in issues that relate to heat dissipation and power ratings. Unlike through hole components which can rely on elevated heat sinks or chassis mounting for cooling, surface mount components require the designer to invent new methods of dissi- pation heat. This report investigates various methods of dissipating heat from surface mount components in free air on standard FR4 boards. The revolutionary methods discussed can increase power ratings by as much as 109%.

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MOTOROLA Technical Developments

INCREASING SURFACE MOUNT MOSFET POWER DISSIPATION THROUGH INNOVATIVE PC BOARD PATTERN DESIGNS

by Chandler Wade and Kenneth Sias

BACKGROUND

  The advent of surface mount packages has resulted in issues that relate to heat dissipation and power ratings. Unlike through hole components which can rely on elevated heat sinks or chassis mounting for cooling, surface mount components require the designer to invent new methods of dissi- pation heat. This report investigates various methods of dissipating heat from surface mount components in free air on standard FR4 boards. The revolutionary methods discussed can increase power ratings by as much as 109%.

PRESENT SITUATION

  Surface mount packages offer advantages in assembly, layout, and EMI. However, FR4 board is not the best material for dissipating heat. Creative alternatives such as new surface mount heat sinks and material such as IMS offer solutions however, these may be cost or size prohibited in certain

applications. Increasing footprint sizes has also been used to increase the power rating of surface mount packages on FR4 board however, the increase surface area is limited in its heat dissipa- tion gains and the added size increase capacitive coupling and decreases board density.

  New methods need to be explored in order to effectively take advantage of using surface mount packages on FR4 boards. That is, by actually replacing the printed circuit board with plated through via patterns, a device's ability to dissipate power increases.

TEST SETUP AND DESIGNS

  First D', and later D' packages were mounted on one side of a two sided PC board. Each pad, a uniquely patterned copper pad approximately
0.143mils thick, was seated a minimum distance of one-half inch away from any other tested samples for thermal isolation (See Figure 1).

Fig. 1 Distance between pads and run length

II Motorola. ,"C. ,997

144 December 1997

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MOTOROLA Technical Developments

  One inch runs connects the device's Drain, Gate and Source to the connector for link up to the power supply. Steady state operating temperatures above 150°C significantly lower a device's MTBF hence, the life of the device. Therefore a controlled junc- tion temperature of 125°C in ambient air (Ta) of 25°C was selected for this experiment. Each device was powered-up individually in a still air test chamber until the 125°C equilibrium junction temperature was achieved. The 20 amp/Phase 9 Analysis Tech thermal analyzer calculated the device's power dis- sipation, junction temperature and voltage, present and average thermal resistance values. The following equation was used interchangably to determine power dissipation and average thermal resistance.

P" = Ti(max) - Ta

(W4

vias, small vias, conic vias and channels through the PCB respectively. Subsequently, pattern area and type combinations that resulted in maximum reduc- tion of FR4 board be...