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SELF-ALIGNED LATE NOR-TYPE ROM PROGRAMMING UTILIZING LDD IMPLANT

IP.com Disclosure Number: IPCOM000008539D
Original Publication Date: 1998-Mar-01
Included in the Prior Art Database: 2002-Jun-21
Document File: 2 page(s) / 106K

Publishing Venue

Motorola

Related People

Lam Ta: AUTHOR [+2]

Abstract

Conventionally, the ROM (Read Only Memory) programming process is performed at the time when the active area of the NMOSFET (N-type Metal Oxide Silicon Field Effect Transistor) devices, which constitute the ROM, are being defined. Usually, the ROM would have completed 30% of the manufacturing process at that time. On the other hand, the late ROM programming technology will allow us to program the ROM after gate formation, when the products have completed 70% of the manufacturing process.

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MOTOROLA Technical Developments

SELF-ALIGNED LATE NOR-TYPE ROM PROGRAMMING UTILIZING LDD IMPLANT

- NLDD implant: Unprogrammed devices receive the NLDD (N-type Lightly Doped Drain) implant but the programmed devices do not receive NLDD implantation. Note that the NLDD implan- tation is not the necessary portion of the contact formation process. The alignment requirement for this step is not critical.

* PLDD implant: Unprogrammed devices do not receive the PLDD (P-type Lightly Doped Drain) implant but the programmed devices do receive PLDD implantation. This PLDD implantation can be a blanket implant.

by Lam Ta and Ray Huang

  Conventionally, the ROM (Read Only Memory) programming process is performed at the time when the active area of the NMOSFET (N-type Metal Oxide Silicon Field Effect Transistor) devices, which constitute the ROM, are being defined. Usually, the ROM would have completed 30% of the manufacturing process at that time. On the other hand, the late ROM programming technology will allow us to program the ROM after gate formation, when the products have completed 70% of the manufacturing process.

  For a NOR Type ROM, ROM programming means disabling certain NMOSFETs in the ROM. Under normal operation, when a high enough voltage such as VDD is applied on the gate, the channel must be conductive all the way from the source region to the drain region of the NMOSFET. Therefore, a basic mechanism of disabling an NMOSFETs is to prevent the formation of channel. An example of late ROM programming is to block the source drain implantation at the area immediately next to the gate. The unimplanted regions will not be conductive. Thus, the channel formation will not be completed. Such a technology suffers from the fact that the alignment of the source-drain implant block is too critical to be manufactured at a low cost. Self-aligned technology is a necessity for low cost manufacturing.

  We have developed a new approach to program a NOR-type ROM. The process flow is shown in Figure 1, in which we compare the process flow of a unprogrammed NMOSFET device with a pro-...