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FCXGA Flexible Test Interface

IP.com Disclosure Number: IPCOM000008591D
Publication Date: 2002-Jun-25
Document File: 3 page(s) / 253K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method that uses a two-layer flex printed circuit in an FCxGA test or debug environment. Benefits include fast turn time, and the ability to work on all types of chip package technologies.

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FCXGA Flexible Test Interface

Disclosed is a method that uses a two-layer flex printed circuit in an FCxGA test or debug environment. Benefits include fast turn time, and the ability to work on all types of chip package technologies.

Background

Currently, blue wires (soldered on small gauge wire) or a secondary planer/socket combination (interposer) is used in FCxGA environments.  However, blue wires are unreliable, do not withstand multiple test cycles and introduce noise by not providing a good return path for the added signal path (stub).  Interposer (planer/socket) combinations add electrical losses by virtue of the added socket and reduce and /or impair the capability in the thermal solution by changing the z-axis height.  Interposers routinely require a unique thermal solution to be supplied with the test interface.

General Description

The disclosed method electrically inserts a two-layer flex circuit between a IC package substrate and the supporting board planer or socket (see Figures 1 and 2). This creates a controlled impedance interface that can be used as a test interface for a logic or network analyzer that matches the native environment. Test instruments that do not require impedance controlled interfaces such as DMMs, or an A/D converter to read an embedded thermal diodes would also benefit from the lower noise environment supplied by the interface. The disclosed method enables numerous test criteria (i.e routing around mechanical supports) to be addressed that ca...