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Method for a circuit restraining land grid array connector

IP.com Disclosure Number: IPCOM000008595D
Publication Date: 2002-Jun-25
Document File: 4 page(s) / 475K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a circuit-restraining land grid array (LGA) connector. Benefits include improved performance.

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Method for a circuit restraining land grid array connector

Disclosed is a method for a circuit-restraining land grid array (LGA) connector. Benefits include improved performance.

Background

                 The disclosed method addresses the problems of holding the circuit onto a land grid array (LGA) connector. Conventionally, this problem described above is solved by mounting posts through the printed circuit board (PCB) attaching to a backing plate (see Figures 1 and 2).

General description

              The disclosed method uses an LGA connector that latches onto features to keep the circuit in place using posts (see Figure 3) or a zero insert force (ZIF) post setup actuated with a lever (see Figure 4). Another option might include compliant tips on the posts or pins. This design latches the circuit directly to the LGA socket.

         LGA connectors make contact with two circuits on electrical contact pads on PCBs or other circuit systems. To get good electrical conduction, one or both of the circuits are pressed into place, bending the contact against the pads.

Advantages

              The disclosed method provides advantages including:

·        No additional hardware is required to mount and hold the circuit in the LGA connector.

·        LGA connectors do not require pins, so the cost of the circuit or processor can be reduced.

·        LGA sockets are often thinner than PGA or other style sockets, so they take advantage of improved electrical characteristics.

·        Optional ZIF post setup is actuated with a lever.

Detailed description

              The disc...