Browse Prior Art Database

Method for package pin compatibility from Fast to Gigabit Ethernet

IP.com Disclosure Number: IPCOM000008685D
Publication Date: 2002-Jul-02
Document File: 9 page(s) / 311K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for package pin compatibility from Fast to Gigabit Ethernet. Benefits include improved functionality.

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Method for package pin compatibility from Fast to Gigabit Ethernet

Disclosed is a method for package pin compatibility from Fast to Gigabit Ethernet. Benefits include improved functionality.

Description

              The disclosed method enables a single board to accommodate components of multiple types of packages and pinouts. The objective is to provide a migration path and build-by-build options for Ethernet speed and capability.

Advantages

              The advantages of the disclosed method include:

§         One board design for multiple Ethernet technologies

§         Reduced manufacturing overhead of multiple SKUs

§         A simple migration path for Fast Ethernet to Gigabit Ethernet

Detailed description

              The disclosed method provides ball compatibility layouts for the following controllers:

§         Fast Ethernet PCI LAN controller (see Figure 1)

§         Fast Ethernet LCI controller (see Figure 2)

§         Gigabit Ethernet PCI LAN controller (see Figure 3)

              The disclosed method can be implemented as in the following schematics:

§         10/100/1000 Mbps Ethernet Controller Combination Symbol (see Figure 4)

§         Physical Interface (see Figure 5)

§         2.5V and 1.5V Power Regulation LED and Crystal Circuits (see Figure 6)

§         PCI Interface (see Figure 7)

§         10/100 Mbps Physical Interface (see Figure 8)


      A   B   C   D   E   F   G   H   J   K   L   M   N   P    
  14   NC   RBIAS 10   TDN   TCK   RDN   FLD[0]   VSS   FLD[4]   FLD[7]   FLA[2]   FLA[3]   FLA[6]   FLA[8] IOCRY   NC   14
  13   TEST   RBIAS 100   TDP   TEXEC   RDP   FLD[1]   3.3V   FLD[5]   FLA[0]   3.3V   FLA[4]   FLA[7]   FLA [10]   FLA[9]   13
  12   LILED   TO   VREF   TI   3.3V   FLD[2]   FLD[3]   FLD[6]   FLA[1]   VSS   FLA[5]   FLA [11]   VSS   3.3V   12
  11   3.3V   SPEED LED   ACT LED   NC   NC   VSS   VSS   NC   3.3V   3.3V   VSS   FLA [12]   XTAL1   XTAL2   11
  10   SMB CLK   SMB ALRT#   VSS   NC   VSS   VSS   VSS   VSS   3.3V   3.3V   3.3V   FLA15 EESK   FLA14 EEDO   FLA13 EEDI   10
  9   ALT  RST#   ISOL ATE#   SMB DAT   NC   VSS   VSS   VSS   VSS   3.3V   3.3V   3.3V   FLWE#   FLCS#   FLA [16]   9
  8   AD30   AD31   CLK RUN#   VSS   VSS   VSS   VSS   3.3V   3.3V   3.3V   NC   FLOE#   3.3V   VSS   8
  7   3.3V   VSS   AD29   VSS   VSS   VSS   VSS   3.3V   3.3V   3.3V   MDM CS#   AD1   AD0   EECS   7
  6   PME#   AD27   AD28   VSS   VSS   VSS   3.3V   3.3V   3.3V   3.3V   VSS   VSS   3.3V   AD2   6
  5   AD25   AD26   CST CHG   VSS   VSS   VSS   3.3V   3.3V   3.3V   3.3V   3.3V   AD5   AD4   AD3   5
  4   IDSEL   AD24   CBE# [3]   VSS   VSS   VSS   NC   NC   NC   3.3V   3.3V   CBE# [0]   AD7   AD6   4
  3   3.3V   VSS   REQ#   AD20   AD17   CBE# [2]   TRDY#   DEV SEL#   GNT#   3.3V   CBE#  [1]   AD13   AD9   AD8   3
  2   SERR#   AD23   RST#   AD19   VSS   FRAME#   VIO   INTA#   PERR#   VSS   AD15   AD12   AD10   3.3V   2
  1   NC   AD22   AD21   AD18   3.3V   IRDY#   CLK   STOP#   PAR   AD16   AD14   AD11   VSS   N...