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METHOD OF SIMULTANEOUS LATE ROM PROGRAMMING AND PERIPHERAL CIRCUIT SELECTION USING NITRIDE SPACER

IP.com Disclosure Number: IPCOM000008708D
Original Publication Date: 1998-Jun-01
Included in the Prior Art Database: 2002-Jul-04
Document File: 2 page(s) / 109K

Publishing Venue

Motorola

Related People

Bill Karau: AUTHOR [+4]

Abstract

Patterning of the spacer nitride layer is used to program ROM and peripheral circuit options late in the fabrication process.

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0 M MO-LA

Technical Developments

METHOD OF SIMULTANEOUS LATE ROM PROGRAMMING AND PERIPHERAL CIRCUIT SELECTION USING NITRIDE SPACER

by Bill Karau, Dale McQuirk, Scott Roth and Stephen Rusinko

I. ABSTRACT

  Patterning of the spacer nitride layer is used to program ROM and peripheral circuit options late in the fabrication process.

II. CURRENT PRACTICE AND PROBLEMS

A. ROM PROGRAMMING

1. "01" LAYER

  "01" layer programming deletes the "active area" silicon nitride diffusion mask for cells which are intended to be non-functional. Field oxide is therefore grown under the polysilicon electrode, preventing source/drain cm-rent flow. "01" layer programming occurs in the initial stages of circuit fabrication and therefore incurs long cycle time for new software code implementations.

2. "04" LAYER

  "04" layer programming uses a photomask to block source/drain diffusions adjacent to the poly- silicon gate electrode for cells which are intended to be non-functional. "04" layer programming, when scaled to smaller geometries, is susceptible to shorting of contacts to substrate if misalignment occurs between the contact photomask and the "04" layer.

3. "55" LAYER

  "55" layer programming uses a photomask to open up intended non-functional polysilicon gate electrodes to a high energy implant through the polysilicon layer making the transistor non- functional. This method is alignment sensitive, has control issues with the high energy implant and transistor integrity degrades with multiple implants,

B. PERIPHERAL CIRCUIT SELECTION

  Peripheral circuits are selected by adding an "active area" silicon nitride diffusion mask in regions connecting diffusion regions in the main circuit to similar regions in peripheral circuits which are intended to be enabled. Field oxide is therefore not grown in these regions, allowing current to flow through a continuous diffusion...