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SELECTIVE AREA LAYER TRANSFER (SALT) FOR WIDE BANDGAP THIN LAYERS ON SI

IP.com Disclosure Number: IPCOM000009032D
Original Publication Date: 1999-Jan-01
Included in the Prior Art Database: 2002-Aug-02
Document File: 2 page(s) / 204K

Publishing Venue

Motorola

Related People

Tom Wetteroth: AUTHOR [+5]

Abstract

The high field strength and wide bandgap of semiconducting silicon carbide gives it a very low intrinsic electronic carrier concentration. As a result the carrier generation rate in Sic is fourteen orders of magnitude lower than that in Si. This makes Sic an ideal material for NVRAM (Non-Volatile Random Access Memory) memory cells, Ultra- Violet detector elements, and power handling tran- sistors at both low and high frequencies.

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MOTOROLA Technical Developments

SELECTIVE AREA LAYER TRANSFER (SALT)

FOR WIDE BANDGAP THIN LAYERS ON SI

by Tom Wetteroth, Karen Moore, Mohit Bhatnagar, Charles Weitzel and Syd Wilson

BACKGROUND

  The high field strength and wide bandgap of semiconducting silicon carbide gives it a very low intrinsic electronic carrier concentration. As a result the carrier generation rate in Sic is fourteen orders of magnitude lower than that in Si. This makes Sic an ideal material for NVRAM (Non-Volatile Random Access Memory) memory cells, Ultra- Violet detector elements, and power handling tran- sistors at both low and high frequencies.

PROBLEM

  Sic wafers are currently only 50 mm in diame- ter making process automation difficult. Additionally, Sic wafers can cost up to 600 times more than silicon per square centimeter. It is desired to obtain the benefits of Sic for unique devices, avoiding the difficulties mentioned above.

SOLUTION

  To leverage the benefits of semiconducting Sic yet avoid the cost of a small diameter, expensive Sic wafer, it is desirable to selectively add regions of Sic to a conventional Si wafer. The benefits of both technologies are achieved by combining Sic and Si electronic devices on the same bulk silicon substrate. This is accomplished by wafer bonding a thin layer of Sic to the Si substrate (Figure 1) after a hydrogen implant. The implant serves to split off a layer of Sic (and/or planarization) during a subse- quent thermal cycle. The unique aspect of this solu- tion is the use of the hydrogen splitting process on pre-patterned and or pre-processed Sic wafers. Figure 2 shows the ability of the hydrogen splitting process to proceed right up to a patterned feature.

The SIC layer is pre-patterned so that elements will be located as desired in the integrated circuit after bonding, and so the remaining Sic wafer may be reused after a minor polishing. Once the combined material structure of Si and Sic is in place, the entire wafer can then be processed in...