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Browse Prior Art Database

SILICON CARBIDE NVRAM ON SILICON

IP.com Disclosure Number: IPCOM000009039D
Original Publication Date: 1999-Jan-01
Included in the Prior Art Database: 2002-Aug-02
Document File: 2 page(s) / 103K

Publishing Venue

Motorola

Related People

Charles Weitzel: AUTHOR [+5]

Abstract

The wide bandgap of semiconducting silicon carbide gives it a very low intrinsic electronic carr- er concentration. Therefore the carrier generation rate in SIC is fourteen orders of magnitude lower than that in Si. This makes SIC an ideal material for NVRAM (Non-Volatile Random Access Memory) memory cells. However SIC technology is very immature compared to Si technology as is evi- denced by the very small wafer size presently avail- able, 2 inch diameter. This small wafer size severe- ly limits Sic's potential for high volume manufac- turing. These limitations are overcome by combin- ing the benefits of Si and Sic on a bulk Si wafers.

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MOTOROLA Technical Developments

SILICON CARBIDE NVRAM ON SILICON

by Charles Weitzel, Karen Moore, Mohit Bhatnagar, Tom Wetteroth and Syd Wilson

BACKGROUND

  The wide bandgap of semiconducting silicon carbide gives it a very low intrinsic electronic carr- er concentration. Therefore the carrier generation rate in SIC is fourteen orders of magnitude lower than that in Si. This makes SIC an ideal material for NVRAM (Non-Volatile Random Access Memory) memory cells. However SIC technology is very immature compared to Si technology as is evi- denced by the very small wafer size presently avail- able, 2 inch diameter. This small wafer size severe- ly limits Sic's potential for high volume manufac- turing. These limitations are overcome by combin- ing the benefits of Si and Sic on a bulk Si wafers.

DESCRIPTION

  The benefits of both technologies are achieved by combining Sic and Si electronic devices on the same bulk silicon substrate. This is accomplished by either growing Sic directly on the Si substrate or by wafer bonding a thin layer of Sic to the Si sub- strate (Figure 1). The Sic layer is then patterned into areas where the memory cell elements will be located in the integrated circuit. The silicon areas which contain the sense amplifiers and other control circuitry can be formed in an epitaxial Si layer grown on the bulk substrate or can be formed direct- ly in the bulk Si substrate using ion implantation.

  Once the combined material structure of Si and Sic is in place, the entire wafer can than be processed in a manner similar to bulk Si fabrication except the steps of forming electronic devices in the

Sic areas will have to follow generally accepted Sic fabrication procedures. In this manner MOS transis- tors can be formed and interconnected using the steps...