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Method and Apparatus For Handling and Testing Electronic Devices on a Carrier

IP.com Disclosure Number: IPCOM000009132D
Original Publication Date: 2002-Aug-08
Included in the Prior Art Database: 2002-Aug-08
Document File: 3 page(s) / 44K

Publishing Venue

Motorola

Related People

Simon Hong Sing She: AUTHOR

Abstract

A carrier concept and design for device transportation and testing are disclosed. A process of Test on Carrier (Flip tray, good unit re-fill, etc.) improves productivity and throughput. A new generation test handler, namely Test-On-Carrier (TOC) handler, was developed. The devices are transported massively with carriers. Devices under test are loaded into carriers by flipping standard device trays to carriers. A number of devices can be tested in massive parallel test on carriers.

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Method and Apparatus For Handling and Testing Electronic Devices on a Carrier

 

Simon Hong Sing She

 

Abstract

A carrier concept and design for device transportation and testing are disclosed.  A process of Test on Carrier  (Flip tray, good unit re-fill, etc.) improves productivity and throughput.  A new generation test handler, namely Test-On-Carrier (TOC) handler, was developed.  The devices are transported massively with carriers.  Devices under test are loaded into carriers by flipping standard device trays to carriers.  A number of devices can be tested in massive parallel test on carriers.

Introduction

The disclosed method addresses the problem of existing Pick & Place test handlers not being efficient enough in device transportation and testing, especially in high-throughput Parallel Test.  Pick-and-place is a quite risky process.  In TOC handler, flip tray functions are used to reduce the pick-and-place processes.  On the other hand, pick-and-place is also a slow process.  To reduce a number of pick-and-place processes, the physical yield lost and machine throughput could be improved.

The semiconductor handling media on input and output of TOC test handler machine uses a standard tray.  The similar handler – Test In Tray handler current available is not able to handle standard trays (i.e. JEDEC).  Special trays are required for device handling.  The demand and cost of such special trays is significant.

For normal production processes, the Test In Tray handler could not handle device packages that have the leads exposed on the package bottom such as BGA, QFN, CSP, etc.  However, Test On Carrier (TOC) is applicable to all existing package types. Standard tray utilization in TOC does not affect other production processes.  Devices are inverted and then placed onto the carrier.  Contact leads of the device are exposed in a dead-bug configuration and are ready to be probed by contact pins at the Test Sites.  Handling a standard outline carrier, such as JEDEC, enables the part path to be highly optimized, dramatically reducing product jams, maximizing tester utilization, and raising test cell throughput.

Proposed Method and General Description

After the semiconductor devices are separated from the leadframe in a Trim/ Form process, the devices are placed on a standard tray, such as a JEDEC tray.  Then the standard trays are stacked up and sent to an input region of a test handler machine. ...