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TESTING OF NON-VOLATILE MEMORY CHARGE PUMPS TO ENSURE RELIABLE VOLTAGE GENERATION USING CLOCK FREQUENCY

IP.com Disclosure Number: IPCOM000009133D
Original Publication Date: 1999-Jun-01
Included in the Prior Art Database: 2002-Aug-09
Document File: 5 page(s) / 262K

Publishing Venue

Motorola

Related People

Christian Dodd: AUTHOR [+3]

Abstract

For security conscience devices e.g. Smartcards, charge pumps required for high voltage generation on non-volatile memories are not usually pinned out on the device to make tampering of voltages con- trolling EEPROM operation more complex and dif- ficult for the potential hacker. This has the draw- back that testing of charge pump voltages via a suit- able pad at probe or package pin at final test is NOT possible. Some devices may also be pad limited or as is the case for Smartcards, not enough package pins available to bond charge pump outputs. This is especially the case for deep sub-micron non-volatile memory technologies e.g. EEPROM, EPROM, FLASH EEPROM which require multiple charge pump voltages for single Vdd operation.

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MOTOROLA Technical Developments

TESTING OF NON-VOLATILE MEMORY CHARGE PUMPS TO ENSURE RELIABLE VOLTAGE GENERATION USING CLOCK FREQUENCY

by Christian Dodd, Philippe Bauser and Steven Donnelly

PROBLEM STATEMENT

  For security conscience devices e.g. Smartcards, charge pumps required for high voltage generation on non-volatile memories are not usually pinned out on the device to make tampering of voltages con- trolling EEPROM operation more complex and dif- ficult for the potential hacker. This has the draw- back that testing of charge pump voltages via a suit- able pad at probe or package pin at final test is NOT possible. Some devices may also be pad limited or as is the case for Smartcards, not enough package pins available to bond charge pump outputs. This is especially the case for deep sub-micron non-volatile memory technologies e.g. EEPROM, EPROM, FLASH EEPROM which require multiple charge pump voltages for single Vdd operation.

  With current sub-micron process technologies, correct charge pump voltages are of vital impor- tance to the overall non-volatile memory perfor- mance and reliability. Incorrect voltages can result in program/erase times increasing to unacceptable levels, especially as the non-volatile memory cells 'wear out'. Also, increased oxide stress can occur which will influence the overall reliability of the module if incorrect voltages are generated. Some non-volatile cell technologies may also suffer from disturb phenomenon, which can be made worse with erroneous charge pump levels. It is key that the charge pump voltages are proven to be correct via testing before devices are shipped to end customers.

  For many of the more recent non-volatile tech- nologies, numerous voltages are required. This has resulted in a significant increase in the die area taken up by the charge pump circuits. Many of these charge pumps have a signiticant proportion of analogue circuits that are subject to high voltages and require adequate test coverage. This makes it more critical to test the charge pump behavior in

terms of current and particularly voltage output. This ensures that there are no potential leakage paths within the pump, especially on the many capacitor structures used.

  Many current test systems cannot measure the high voltages used by non-volatile technologies due to hardware limitations. Thus, to measure high pos- itive and negative charge pump voltages, additional external circuits or additional tester hardware needs to be developed or purchased respectively. With current Smartcard security methodologies and high density FLASH EEPROM memories tending towards Design For Test (DFI) and Self Test, the use of low cost test systems will become critical. It is evident that current high voltage charge pumps can provide potential production test issues or at least increase the cost of the desired test system. To resolve these issues a new test method is proposed for production test of high voltage charge pumps.

SOLUTION...