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A MEMORY ARRAY FOR COPYING DATA BLOCK IN A PARALLEL MANNER

IP.com Disclosure Number: IPCOM000009230D
Original Publication Date: 1999-Jun-01
Included in the Prior Art Database: 2002-Aug-13
Document File: 3 page(s) / 100K

Publishing Venue

Motorola

Related People

Dror Halahmi: AUTHOR [+3]

Abstract

In many applications there is a need to duplicate a block of data. For example a transcoder which processes data associated with several communica- tion channels. Usually, this type of tramcoder uses a "context switch" which enables the transcoder to skip between data blocks associated with different communication channels. Performing a context switch involves fetching data blocks. A transfer of a single block can take many clock cycles.

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Developments Technical 0 M MO-LA

A MEMORY ARRAY FOR COPYING DATA BLOCK IN A PARALLEL MANNER

by Dror Halahmi, Shai Shperber and Moshe Refaeli

  In many applications there is a need to duplicate a block of data. For example a transcoder which processes data associated with several communica- tion channels. Usually, this type of tramcoder uses a "context switch" which enables the transcoder to skip between data blocks associated with different communication channels. Performing a context switch involves fetching data blocks. A transfer of a single block can take many clock cycles.

  The mentioned above fetch of data blocks con- sumes a relative high amount of MIPS, thus degen- erating the performance of the transcoder. For example, a two channel context switch GSM Full Rate vocoder, consumes about 0.2 MIPS which is about 5% of the MIPS required to perform the vocoder.

  The memory array for copying data block in a parallel manner (i.e.- the memory array) allows to transfer a block of data in a parallel manner, in a single clock cycle. A data block is transferred from a source memory array to a destination memory array. In many applications, this memory array reduces the MIPS and power consumption required to transfer a block. The implementation of the memory array requires a negligible increment of the chip die size.

  Many memory arrays can be coupled to each other but for convenience of explanation it is assumed that a single memory array is coupled to another memory array.

  The blocks can be transferred from a source memory array to a destination memory array. The destination memory array$an also transfer blocks t...