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Method for a process flow for fabricating transistors on both sides of the top wafer in a vertically stacked wafer system

IP.com Disclosure Number: IPCOM000009254D
Publication Date: 2002-Aug-13
Document File: 5 page(s) / 109K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a process flow for fabricating transistors on both sides of the top wafer in a vertically stacked wafer system. Benefits include improved functionality and improved performance.

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Method for a process flow for fabricating transistors on both sides of the top wafer in a vertically stacked wafer system

Disclosed is a method for a process flow for fabricating transistors on both sides of the top wafer in a vertically stacked wafer system. Benefits include improved functionality and improved performance.

Background

      Conventionally, transistors cannot be processed on both sides of a wafer due to a high-temperature process and a wafer-handling problem.

Description

      The disclosed method isa technique and a process flow for fabricating transistors on both sides of the top wafer in a vertically stacked wafer system (see Figure 1). This method enables a two-fold increase in the number of transistors per silicon layer.

      The key elements of the method include two process options:

·        Cu bonding and low-temperature processing, such as Si recrystallization or selective high-temperature processing, such as laser annealing

·        Typical Si processing of both sides of a wafer using a handle process, then Cu bonding

Advantages

      The disclosed method provides advantages, including:

·        Improved functionality due to a process flow using a handle process or a low-temperature laser annealing process

·        Improved performance due to the addition of transistors to both sides of a wafer

Detailed description 

      The disclosed method is a method of fabricating additional transistors on vertically stacked wafer system. Below are a few suggested process flows.

 


Process flow 1

      Process flow 1 includes copper bonding followed by the silicon process. The flow is comprised of the following steps:

1.           Fabricate both the top and bottom wafers separately

2.           Perform the face-to-face Cu bonding process (see Figure 2)

      a.           Pe...