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Method for a selective surface finish technology to enable a high-performance LGA substrate

IP.com Disclosure Number: IPCOM000009479D
Publication Date: 2002-Aug-27
Document File: 2 page(s) / 82K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a selective surface finish technology to enable a high-performance land-grid array (LGA) substrate. Benefits include improved functionality, improved performance, and improved reliability.

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Method for a selective surface finish technology to enable a high-performance LGA substrate

Disclosed is a method for a selective surface finish technology to enable a high-performance land-grid array (LGA) substrate. Benefits include improved functionality, improved performance, and improved reliability.

Background

      The disclosed method addresses one of the challenges of enabling high performance organic flip-chip land-grid array (FC-LGA) substrates. To maintain a low contact resistance in the LGA socket, the LGA pads must be plated with sufficient Au so that oxidation does not degrade the performance with time. In contrast, the controlled collapse chip collect (C4) joints on the opposite side of the substrate must contain a minimum amount of Au, as it can depress the melting point of the solder and lead to reliability problems because of the formation of brittle intermetallic compounds.

              Conventionally, there is no high-performance organic LGA substrate. In general, organic substrates make use of a single surface finish on all exposed metal on the substrate.

General description

              The disclosed method selectively deposits different surface finishes on different areas of an FC-LGA substrate. The different surface finishes are tailored to meet the requirements of either the LGA, interconnect or surface-mount technology (SMT) pads. The disclosed method enables the use of thicker Au only where it is needed (such as the LGA pads), thus enabling a high-performance LGA substrate.

              Th...