Browse Prior Art Database

NOISE IMMUNE POWER-ON RESET

IP.com Disclosure Number: IPCOM000009488D
Original Publication Date: 1999-Sep-01
Included in the Prior Art Database: 2002-Aug-28
Document File: 1 page(s) / 35K

Publishing Venue

Motorola

Related People

A. J. Edwards: AUTHOR

Abstract

It is not unusual to find applications where of inactivity, but will then latch this POR and use it while it is desirable to have an initial Power-ON to disable the power supply to the POR detector cir- Reset there is a strong desire to avoid them being cuit so that it cannot create more resets until the created every time there is a disturbance on the POR latched signal has decayed. With modem CMOS cir- generator's power supply! The idea of this circuit is cuitry this makes it possible to ignore spurious POR that it will detect an initial POR after a long period events for many 10's of microseconds.

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Developments Technical 0 M MdlylRoLA

NOISE IMMUNE POWER-ON RESET

by A. J. Edwards

  It is not unusual to find applications where of inactivity, but will then latch this POR and use it while it is desirable to have an initial Power-ON to disable the power supply to the POR detector cir- Reset there is a strong desire to avoid them being cuit so that it cannot create more resets until the created every time there is a disturbance on the POR latched signal has decayed. With modem CMOS cir- generator's power supply! The idea of this circuit is cuitry this makes it possible to ignore spurious POR that it will detect an initial POR after a long period events for many 10's of microseconds.

Noisy Power Supply

LATCH

lpoR GND

0 Motomla. 1°C. ,999 150 September 1999

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