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Method for a processor pin field shroud

IP.com Disclosure Number: IPCOM000009500D
Publication Date: 2002-Aug-28
Document File: 5 page(s) / 303K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a processor pin field shroud. Benefits include improved reliability and improved design flexibility.

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Method for a processor pin field shroud

Disclosed is a method for a processor pin field shroud. Benefits include improved reliability and improved design flexibility.

Background

        � � � � � Initial system builds using a 64-bit processor results in assembly fallout of approximately18K defects per million (dpm) for bent pins and 5K dpm for the incorrect installation of the processor onto the socket. The projected combined fallout for these issues could be as high as 47K dpm with a 95% confidence interval. This fallout results in a high per-processor cost impact due to scrapped processors and repair time. This increased cost translates into high customer dissatisfaction.

        � � � � � The conventional solution to these problems is repeated operator training, which has had a very limited effect on reducing the fallout.

        � � � � � As packages shrink, the pin pitch and diameter are reduced, and the pins become fragile. When the pin field is fully exposed, any surface that can potentially contact the bottom of the processor becomes a possible source for processor pin damage (see Figure 1). The slightest side load can move a pin out of position resulting in crushed pins as the processor is inserted into the socket. Edge pins are especially vulnerable to being knocked out of position even during installation. Any lateral movement by the technician to align the processor to the socket as the pins reach the socket cover can cause a pin to catch and bend on the face of the socket.

        � � � � � In future products as the pitch shrinks, the problem is expected to be worse because the pins become increasingly fragile, resulting in even higher expected fallout for bent processor pins.

General description

        � � � � � The disclosed method is a processor pin field shroud. The method addresses the problem of bent processor pins during the installation of a processor onto a socket by providing a recessed pocket for the pin field. This approach prevents side impact to the pins and some vertical impact protection. The close-tolerance fit between the shroud and the socket prevents the incorrect installation of the processor by not allowing the pins to engage the socket unless the processor i...