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ADAPTIVE LOOP BANDWIDTH CONTROL ARCHITECTURE FOR SYNTHESIZER APPLICATIONS

IP.com Disclosure Number: IPCOM000009523D
Original Publication Date: 1999-Sep-01
Included in the Prior Art Database: 2002-Aug-29
Document File: 2 page(s) / 106K

Publishing Venue

Motorola

Related People

Richard M. Dougherty: AUTHOR

Abstract

With the present emergence of far-reaching communication systems, the need for improved syn- thesizer performance has received renewed focus. Conjointly, synthesizers operating over several frequency decades and providing excellent phase noise, quick settling time, fine frequency step size and low spurious performance has gained new prominence. The problem normally encountered regarding these requirements is that circuit condi- tions for fast settling time, fine frequency step size and low spurious performance are diametrically opposed. In order to address this, synthesizer designs have evolved into multi-loop designs employing adaptive architectures.

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Developments Technical 0 M MOTOROLA

ADAPTIVE LOOP BANDWIDTH CONTROL ARCHITECTURE FOR SYNTHESIZER APPLICATIONS

by Richard M. Dougherty

  With the present emergence of far-reaching communication systems, the need for improved syn- thesizer performance has received renewed focus. Conjointly, synthesizers operating over several frequency decades and providing excellent phase noise, quick settling time, fine frequency step size and low spurious performance has gained new prominence. The problem normally encountered regarding these requirements is that circuit condi- tions for fast settling time, fine frequency step size and low spurious performance are diametrically opposed. In order to address this, synthesizer designs have evolved into multi-loop designs employing adaptive architectures.

  With reference to synthesizer settling, the com- posite time consists of both frequency acquisition and phase settling. In addition, frequency and phase settling are directly dependent upon closed loop bandwidth. In cases where the frequency error is large the resulting settling time can become exten- sive. In order to transcend the foregoing, the use of independent coarse and fine frequency control of the VCO is employed. This technique allows the result- ing frequency error and resulting settling time to be reduced. In support of this, synthesizer architec- tures have adopted the use of Voltage Control Oscillators (VCO) employing independent coarse and fine frequency controls. When directed to a new frequency, the coarse tune control is used to reduce large frequency errors and fine tune for phase lock loop control.

  Using this technique a problem normally encountered is that the fine tune sensitivity (MHz/volt) is dependent upon the VCO's coarse tune voltage and sensitivity variations of 4: 1 are not uncommon. In light of this, conventional diode breakpoint linearizer used to linearize sensitivity variations can not be used because VCO's fine tune sensitivity is dependent upon the coarse tune voltage

value, which varies across the synthesizer's opera- tional range.

  Taking these issues into consideration, the fol- lowing outl...