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BACKPLANE HOST CIRCUIT ENABLES EMBEDDED SPCI AND PERMITS A UNIVERSAL PROCESSOR DESIGN

IP.com Disclosure Number: IPCOM000009536D
Original Publication Date: 1999-Sep-01
Included in the Prior Art Database: 2002-Aug-30
Document File: 2 page(s) / 132K

Publishing Venue

Motorola

Related People

Edoardo Campini: AUTHOR

Abstract

This paper describes how a Backplane Host Circuit enables the existence of an embedded SPCI system as well as a universal processor design that is independent of slot location.

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Developments Technical 0 M MOTOROLA

BACKPLANE HOST CIRCUIT ENABLES EMBEDDED SPCI AND PERMITS A UNIVERSAL PROCESSOR DESIGN

by Edoardo Campini

ABSTRACT

  This paper describes how a Backplane Host Circuit enables the existence of an embedded SPCI system as well as a universal processor design that is independent of slot location.

PROBLEMS WITH EXISTING PCI AND PCI DERIVATIVE SYSTEMS

  Existing PC1 systems either require a complex motherboard which contains a processor along with PC1 host circuitry, or a dedicated unique slot which is reserved for a processor card which also has PC1 host circuitry. This arrangement causes the mother- board to be complex and inflexible, and forces the host processor card to be of a different design from all other processor cards in a system. In addition, SPCI does not have enough spare pins to allow for a pluggable SPCI host processor. Hence, existing PC1 systems are dependent on a complex motherboard.

SOLUTION TO PROBLEMS

  The development of an independent Backplane Host Circuit would separate host circuit functions from either the motherboard or a processor card and solve all existing problems. This would permit the

development of simpler motherboards and a univer- sal processor card that would be slot independent. This would also permit the development of embed- ded SPCI systems without a motherboard.

METHOD FOR A BACKPLANE HOST CIRCUIT

  The circuitry required to implement host hard- ware functions are minimal and readably achievable

using existing FPGAs or CPLDs. Figure 1 repre- sents a block diagram of the functions that must be supplied in order to provide all of the required host hardware functions. The first block represents the...