Dismiss
InnovationQ/InnovationQ Plus content will be updated on Sunday, June 25, 10am ET, with new patent and non-patent literature collections. Click here to learn more.
Browse Prior Art Database

BULK ERASE MODE WITH BULK VERIFY FOR MEMORIES

IP.com Disclosure Number: IPCOM000009580D
Original Publication Date: 1999-Sep-01
Included in the Prior Art Database: 2002-Sep-04
Document File: 5 page(s) / 184K

Publishing Venue

Motorola

Related People

Alexis Marquot: AUTHOR [+2]

Abstract

In some applications, like smart cards, it is very crucial to be able to erase the whole content of a memory, with a high degree of confidence. There is therefore a need to have two coupled functions for these types of applications: A logic circuit, which allows, in READ mode, to select simultaneously ALL the ROWS of the array, turning it into a gigantic series of wired OR.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 41% of the total text.

Page 1 of 5

0 M

MOTOROLA Technical Developments

BULK ERASE MODE WITH BULK VERIFY FOR MEMORIES

by Alexis Marquot and Michel Bron

  l A special serial exclusive OR (XOR) circuit, combining all the evaluation results, and yielding an overall ERROR flag. The ERROR flag is at a logi- cal "0" if ALL the bits of the array are erased, and a logical "1" if at least ONE bit is not erased in the entire array.

  Figure 1 shows a simple implementation of the new array architecture.

  Each sense amplifier 2 is connected to one or more bit lines 8. In this example, two bit lines are connected to one sense amplifier.

  A data latch 4 is associated to each "sense amplifier". The data latches are used to hold the data which is to be written into the array. They are connected to the data bus, by conventional means which is not described here. Each can be reset, in view of the ERASE process.

  An XOR cell 6 is able to compare the output of the sense amplifier and the content of the associated "data latch".

  A serial XOR line 10, with a precharged/dis- charged mechanism combines all the bit lines XOR results, and yields an ERROR signal.

  A typical timing diagram for bulk erase and bulk verify is shown in Figure 2.

  During "DL RESET" phase (time t, - t,), all data latches 4 are reset by means of a signal DL RESET. At the same time, all ROWS and BIT

0 Molnmla. 1°C. ,999 295 September 1999

l PROBLEM

  In some applications, like smart cards, it is very crucial to be able to erase the whole content of a memory, with a high degree of confidence. There is therefore a need to have two coupled functions for these types of applications:

   A logic circuit, which allows, in READ mode, to select simultaneously ALL the ROWS of the array, turning it into a gigantic series of wired OR.

  l A set of sense amplifiers connected to several bit lines.

  l A BULK ERASE mode, allowing to erase the entire memory array at once.

  l A BULK ERASE VERIFY mode, to check that the array has effectively been erased.

  A conventional way to check that the array has actually been erased, is to implement some logic which checks that a few key bytes, or bits, have been erased. The drawback of this simple method is that it does not actually check that ALL bits are erased.

  Another possible method is to read back the array contents, byte per byte, to check their values. The drawback of this method is precisely the fact that it involves reading back the array. Since the array content is made available outside the array, possibly on the data bus, and the array may not be entirely erased and so could still hold some confi- dential data, such a method could be a security weakness.

SOLUTION

1. Memory Architecture

  To solve the problem, a new array architecture is proposed, which architecture allows for ALL bits of the array to be checked to ensure they are all erased, WITHOUT reading back the array, and therefore avoids making its content available outside of the array. The new array architecture achieves this using the following f...