Browse Prior Art Database

CLASS AB UNITY-GAIN BUFFER AMPLIFIER FOR CMOS TECHNOLOGY

IP.com Disclosure Number: IPCOM000009722D
Original Publication Date: 2000-Jan-01
Included in the Prior Art Database: 2002-Sep-12
Document File: 4 page(s) / 149K

Publishing Venue

Motorola

Related People

Peter Andrews: AUTHOR

Abstract

The circuit was developed to allow a CMOS operational amplifier or operational transconduc- tance amplifier, which typically have fairly high impedance outputs, or lose considerable gain if loaded resistively, to drive a low resistance load without gain impairment. The circuit is a unity gain amplifier that performs the same function as the well-known source or emitter (in the case of bipolar) follower. However, it has the advantage of zero input-output offset, symmetrical source and sink capability and with AI3 biasing it can source or sink a current greater than its quiescent current.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 50% of the total text.

Page 1 of 4

0 M MOTOROLA Technical Developments

CLASS AB UNITY-GAIN BUFFER AMPLIFIER FOR CMOS TECHNOLOGY

by Peter Andrews

could be changed to modify the circuit characteris- tics, particularly the ratio of quiescent current to maximum output current. (The circuit would work with equal sized transistors but it would not be very efficient.) The input signal is applied to one side of each differential pair and the output voltage is applied to the other side of each differential pair.

  In the quiescent state when the input and output voltages are equal the reference currents ICl and ITI are split by the asymmetric differential pairs such that l/6 of ICl flows into the diode connected P3 and l/6 of IT1 flows into the diode connected N3. These currents are then "mirrored" into the out- put stage P4, N4 so that the quiescent current in these devices is the same as the reference currents ICl andIT1.

  Now imagine that the output is connected to a resistive load, which is connected to a "mid-supply" at approximately half the supply voltage as shown in Figure 1. When the input is moved positively addi- tional current will be diverted into Nl which will be delivered to P3 and minored to P4 to pull the output more positively. Clearly as the output also moves positively this reduces the differential voltage between the gates of Nl and N2 until the circuit is just providing enough current to satisfy the demand

of the load.

  In the case of a very heavy (low impedance) load the whole of the reference current will be sup- plied to the mirror diode and this will be multiplied by, in this case, 5 times, such that the maximum source current is 5 times the quiescent current in the output stage. It should be noted that when one dif- ferential pair becomes active the complementary cir- cuit becomes less active thus providing additional gain. It is clear that the circuit will work equally well for both sourcing and sinking by virtue of its symmetry.

0 hlammla. 1°C. 2cal 176 January 2&m

PURPOSE

  The circuit was developed to allow a CMOS operational amplifier or operational transconduc- tance amplifier, which typically have fairly high impedance outputs, or lose considerable gain if loaded resistively, to drive a low resistance load without gain impairment. The circuit is a unity gain amplifier that performs the same function as the well-known source or emitter (in the case of bipolar) follower. However, it has the advantage of zero input-output offset, symmetrical source and sink capability and with AI3 biasing it can source or sink a current greater than its quiescent current.

  These features are particularly valuable with newer technologies where supply voltages are becoming more restricted. The properties of sym- metry also contribute to low distortion which is important in many applications such a...