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WIDEBAND DISCRETE HILBERT TRANSFORMS USING LOW SPEED DIGITAL HARDWARE

IP.com Disclosure Number: IPCOM000009837D
Original Publication Date: 2000-May-01
Included in the Prior Art Database: 2002-Sep-23
Document File: 5 page(s) / 205K

Publishing Venue

Motorola

Related People

Erie Clelland: AUTHOR

Abstract

This paper describes a new technique for the implementation of wideband Discrete Hilbert Transforms (DHT's) via the use of parallel processing implemented in commonly available lower speed digital hardware. The DHT is a well known method of generating analytic (i.e. complex valued) signals from real valued signals which are sampled at a high rate with an analog-to-digital converter (ADC). The parallel structure involves redundant use of demultiplexed high speed samples in a variable tapped delay line structure.

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This is the abbreviated version, containing approximately 33% of the total text.

MOTOROLA

Technical Developments

WIDEBAND DISCRETE HILBERT TRANSFORMS USING LOW SPEED DIGITAL HARDWARE

by Erie Clelland

ABSTRACT

This paper describes a new technique for the implementation of wideband Discrete Hilbert Transforms (DHT's) via the use of parallel processing implemented in commonly available lower speed digital hardware. The DHT is a well known method of generating analytic (i.e. complex valued) signals from real valued signals which are sampled at a high rate with an analog-to-digital converter (ADC). The parallel structure involves redundant use of demultiplexed high speed samples in a variable tapped delay line structure.

The parallel and delayed samples are then fed to a parallel filter block which performs the necessary arithmetic operations. The internal structure of the DHT is also rate scaleable to a wide variety of clock speeds for various applications.

PROBLEMS AND LIMITATIONS OF DIRECT SERIAL IMPLEMENTATIONS

Wideband digital receivers which have the requirement for signal processing of complex valued data have constraints placed upon their design due to rate limitations of commercially available digital

I a.-l ProCCSIin&

Inplt Real Bandpass Samples @ Rat~ Fs

1:1

D E M U X

hardware. The development of dedicated custom Application Specific Integrated Circuits (ASIC's) for wideband applications is the typical design path which is often chosen, even though such developments involve great expenditure of funds and the flexibility limitations of developing hard-wired solutions to these wideband signal processing functions.

The need for analytic signals in such receivers is required due to the type of processing perfonned on the signals, whether the receiver is to measure signal properties, demodulate and extract transmitted information from the signals or provide other useful information about the transmitter.

Common approaches to perfonn this function are for direct implementation of a DHT operating with inputs at the high speed sample rate and providing outputs at one half of the input sample rate.

These direct approaches are commonly tenned "seriar' DHT's. They require relatively few digital arithmetic operations (i.e. multiplies, adds and shifts) (see Figure 1), but the cost is in terms of requiring high speed custom ASIC which are costly and are difficult to build and qualify, especially for space environments as exist for satellites.

Compl~ Baudpass ~Ies @ RaIC Fs12

Nou-Cohcnnt DownI Coavenioo Rerer.occ

Output Compl~ Baseband ~Ies @ Rate Fs12

Q Ch8DIIeI ~g

Fig. 1 Serial Discrete Hilbert Transform

Motorola, Inc. 2000

141

May 2000

MOTOROLA

The I and Q channel processing varies depending upon the application. In some serial DHT's, the Q channel contains all the non-zero Hilbert Filter impulse response coefficients and the I channel contains only delay line elements. In other applications, the Hilbert coefficients are alternated between the I and the Q channel with a sign inversion for every other coefficient and are also in...