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High-Speed Differential Transmitter With Programmable Pre-Emphasis and De-Emphasis Options Based Upon Current Bias Circuit With Adjustable Current Strength

IP.com Disclosure Number: IPCOM000010055D
Publication Date: 2002-Oct-16
Document File: 4 page(s) / 179K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method that uses a high-speed differential transmitter to pre-compensate for losses in the media at certain data rates (Pre-Emphasis, or PE) and avoid over-driving at the others (De-Emphasis, or DE). Benefits include providing a robust and economical implementation of PE and DE.

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High-Speed Differential Transmitter With Programmable Pre-Emphasis and De-Emphasis Options Based Upon Current Bias Circuit With Adjustable Current Strength

Disclosed is a method that uses a high-speed differential transmitter to pre-compensate for losses in the media at certain data rates (Pre-Emphasis, or PE) and avoid over-driving at the others (De-Emphasis, or DE). Benefits include providing a robust and economical implementation of PE and DE.

Background

Currently, there are a number of options to achieve PE and DE including:

·        Dynamic change of current through adjustment of the current compensation circuit.

·        Additional drivers turned on to supply more current when needed, then turned off.

·        A charging device used to store and release energy when PE is needed

However, depending on the option, flexibility, accuracy, or expense is sacrificed.

General Description

The disclosed method uses additional drivers along with pre-determined current bias settings. These are translated into current multipliers by the programmable current bias block using multiple current mirror legs, while driver control is facilitated by PE/DE data logic block. The disclosed method is both economical and flexible. Implementation of current strength adjustment gives control to each transmitter port independently (since each port can have a separate current bias block). The current mirror legs are a fraction of the main driver current source – e.g., to get a 60% increase in driver current, it needs only a 60% increment increase in size in the fractioned leg. Moreover, since the total current in the system remains constant, there is no common mode noise associated with this method.

Adjustment of drive strength starts with selection of current strength performed in the current bias circuit. A diagram describing implementation of this circuit is shown in Figure 1. Bias_Signal is sent to the drivers. If the driver is implemented as shown in Figure 2, then current ICS of the Current Source (CS) can be written as:

            (1)

where Iref is a reference current (shown in Figure 1), W is a relative PMOS device size multiplier compared to 1x-size PMOS device in current compensation block from Figure 1 and Bias_Setup<2:0> are binary-value variables, which take a value of 1 when corresponding switch in current bias circuit is closed, and 0 when this switch is open. Expressions are derived for drive strengths in PE and DE states using the proposed scheme:

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