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Method for an integrated heat spreader and Faraday cage structure for improved thermal/electrical performance

IP.com Disclosure Number: IPCOM000010067D
Publication Date: 2002-Oct-16
Document File: 7 page(s) / 120K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for an integrated heat spreader and Faraday cage structure for improved thermal/electrical performance. Benefits include improved thermal performance and improved performance.

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Method for an integrated heat spreader and Faraday cage structure for improved thermal/electrical performance

Disclosed is a method for an integrated heat spreader and Faraday cage structure for improved thermal/electrical performance. Benefits include improved thermal performance and improved performance.

Background

              One of the major challenges in operating the CPU at higher frequency is created by the junction temperature limit. The junction temperature limit depends on how efficient the thermal solution is in extracting the heat generated from the hot spot of the processor. Most CPUs have nonuniform heat dissipation because the floating point and arithmetic logic unit that operates at a higher frequency than other circuits on the die.

              Most CPUs have nonuniform power distribution that results in nonuniform temperature across the die. The goal of a good thermal design is to evenly distribute this nonuniform temperature into a more uniform temperature distribution (see Figure 1). As uniformity is improved, heat transfer efficiency into the ambient environment is improved.

              The disclosed method addresses the following problems:

•             Greater thermal resistance from casing to junction (Rjc) limited by the geometry and thermal conductivity of the heat spreader and the thermal interface material (TIM)

•             More probability to excite resonance at electromagnetic interference (EMI) frequencies due to larger heatsink features

              Conventional heat spreaders in a package make use of solid copper lids coated with nickel and attached to the P+ silicon substrate through thermal interface material (TIM, see Figure 2). Rjc is limited by the area and thermal conductivity of the heat spreader and TIM.

              Because the chip feature sizes are shrinking with every generation, the thermal density increases considerably, requiring smaller Rjc targets by pushing the TIM thickness to even smaller numbers and using materials with increased thermal conductivity.

      With shrinking process technology to maximize the operating frequency of a product, a lower Rjc value is imperative because junction temperature creates a hard limit on the maximum frequency at which a product can operate.

General description

              The disclosed method is an integrated heat spreader and Faraday cage structure for improved thermal/electrical performance. The method increases the area available for the heat flow path by creating a copper grid pattern into the P+ silicon substrate and filling it with copper. It has 4x higher thermal conductivity than conventional TIM and 2.5X higher thermal conductivity than silicon. With the increased area for the heat-flow path, the use of copper results in a much lower Rjc. The grid filled with copper functions as a good Faraday cage and reduces the chances of exciting resonance at EMI frequencies.

Advantages

              The disclosed method provides advantages, including:

•             Improved t...