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Method for hardware event monitoring

IP.com Disclosure Number: IPCOM000010116D
Publication Date: 2002-Oct-23
Document File: 4 page(s) / 41K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for hardware event monitoring. Benefits include improved performance.

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Method for hardware event monitoring

� Disclosed is a method for hardware event monitoring. Benefits include improved performance.

Background

        � � � � � A very common task performed in any I/O processor (IOP) application is to monitor the status of a memory location (or register) internal or external to the IOP. To perform this monitoring, software schedules a process to read a register on a regular basis and compare the result to some value. Only if the value matches a defined condition is any further action taken. Each time the process is run, the performance of other applications running on the IOP is impacted.

        � � � � � The registers are read to determine if an event occurred that requires corrective processing. An example would be error conditions that occur in an I/O controller. The issuance of an interrupt is a preferred method of indicating an error. However, interrupts may not be generated for all conditions that require corrective action.

Description

        � � � � � The disclosed method monitors a register in hardware without requiring software to perform the read/compare, eliminating the overhead associated with the software activity. The method is similar to a direct memory access (DMA). Software initially sets up the event monitoring. Then hardware performs the operation autonomously. When an error condition is detected, an interrupt is raised, and software handles the event.

        � � � � � The event monitor is part of an IOP (see Figure 1). The event monitor is programmed by the processor core. Based on the frequency that polling is required, the event monitor reads the memory location through th...