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Method for utilizing stubby pins to provide flexural compliance for BGA interconnects with low-CTE packages

IP.com Disclosure Number: IPCOM000010187D
Publication Date: 2002-Oct-30
Document File: 5 page(s) / 160K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for utilizing stubby pins to provide flexural compliance for ball-grid array (BGA) interconnects with low-coefficient for thermal expansion (CTE) packages. Benefits include improved reliability.

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Method for utilizing stubby pins to provide flexural compliance for BGA interconnects with low-CTE packages

Disclosed is a method for utilizing stubby pins to provide flexural compliance for ball-grid array (BGA) interconnects with low-coefficient for thermal expansion (CTE) packages. Benefits include improved reliability.

Background

        � � � � � The shear strain in the solder interconnect between the package and the motherboard results from the following factors:

•        � � � � The CTE mismatch between the package substrate and the motherboard

•        � � � � Temperature change (delta) during temperature cycling

•        � � � � Package size (the distance of the outermost solder joint from the center of the package)

•        � � � � Standoff height between the package and the motherboard (such as the solder joint height)

•        � � � � Interconnect joint design

        � � � � � The CTE mismatch, temperature delta, and package size are determined by the materials, process, and design utilized for the product.�

        � � � � � The use of low-CTE substrates, like low cte metal core substrate and ceramic substrates, results in a large CTE mismatch between the package and the motherboard, increasing BGA fatigue risk during temperature cycling.

        � � � � � A part of the shear strain induced in the solder joint gets accumulated as nonrecoverable inelastic strain, leading to fatigue failure of the joint during temperature cycling.

        � � � � � Column-grid array (CGA) is a technique that is conventionally used to attach ceramic packages to motherboards. A tall column of solder increases the standoff between the package and the motherboard. Increasing the standoff decreases solder joint strain.

        � � � � � The conventional solution includes a package substrate with copper lands (see Figure 1).

General description

        � � � � � The disclosed method utilizes short flip-chip pin-grid array (FCPGA) style pins (see Figure 2). They provide lateral compliance for BGA solder joints to reduce the strain induced in the joint during temperature cycling. This approach increases the joint’s fatigue life.

        � � � � � The key element of the method is the use of short (stubby) copper pins on the landside of the substrate that are attached using conventional pin-attach technology. These pins attach to solder balls.

Advantages

        � � � � � The disclosed method provides advantages, including:

•        � � � � Improved reliability due to improved joint fatigue life

•        � � � � Improved cost effectiveness due to the use of the BGA technique rather than the...