Browse Prior Art Database

Method for emulation testing before programming a PROM

IP.com Disclosure Number: IPCOM000010679D
Publication Date: 2003-Jan-08
Document File: 4 page(s) / 81K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for emulation testing before programming a programmable read-only memory (PROM). Benefits include improved functionality and improved reliability.

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Method for emulation testing before programming a PROM

Disclosed is a method for emulation testing before programming a programmable read-only memory (PROM). Benefits include improved functionality and improved reliability.

Background

              Conventionally, VLSI devices are tested using the limited PROM-override methods available to determine the ideal setting for each unit. The PROMs are programmed, and the units are tested again. A test suite ensures that the programmed PROMs function with the expected results. Staging PROM programming after the conventional test stage requires overriding the unprogrammed PROMs to enable the standard post-PROM programming test suite. Moving PROM programming past test enables reduction in the inventory committed to a specific product stock keeping unit (SKU), which maximizes the value of product in inventory.

              The conventional method of overriding the data in a PROM is downloading PROM data into serial shift registers, which can get data from the PROM array/control logic or from an external interface. Overriding serially distributed PROM data requires only loading the shift register with the data. This method is still in use as a redundant and easy-to-use override on serially distributed data. However, this method can only be used after the initial power-up logic and core clock generation are stabilized. This method is not useful for logic that requires valid PROM data prior to valid power-up logic (PWRGD status) or phased-lock loop (PLL) lock (core clock generation).

      Other prior override methods use a control register access or other external instruction to override the distributed PROM data at the point of microcode or configuration logic use. Again, these solutions cannot affect PROM data for logic active prior to a valid PWRGD status or PLL Lock and is useless if the relevant section of microcode has already executed.

      Other VLSI devices use a PROM-logic architecture that enables overriding PROMs with a configuration register. It is placed downstream of the PROM outputs and can be loaded with a PROM setting. The device can then be reset with that setting overriding the actual state of the PROM. However, the normal read and distribution of PROM data is interrupted to preserve the state of the configuration register.

General description

              The disclosed method is an emulation test before programming a PROM. The method includes four major components (see Figures 1 and 2):

•             Implementation on silicon to enable PROM (which includes polysilicon fuses) emulation until a hard-reset occurs or the functionality is turned off

•             Emulation while conducting a normal download and distribution of PROM data

•             Test application that enables various PROM settings to be evaluated in device testing, which can occur before a final setting is selected and programmed (The same mechanism can then be applied to override an existing PROM setting as required.)

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