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Method for a hybrid BGA and PGA package

IP.com Disclosure Number: IPCOM000010741D
Publication Date: 2003-Jan-15
Document File: 3 page(s) / 76K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a hybrid ball grid array (BGA) and a pin grid array (PGA) package. Benefits include improved functionality and improved design flexibility.

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Method for a hybrid BGA and PGA package

             

             

Disclosed is a method for a hybrid ball grid array (BGA) and a pin grid array (PGA) package. Benefits include improved functionality and improved design flexibility.

Background

              Conventional BGA technology requires multiple vias (see Figure 1).

              Conventional PGA technology uses bottom-side routing (see Figure 2). The fanout is forced to the outer edges of the package due to the decreased number of routing channels for the bottom side.

Description

              The disclosed method is a hybrid ball grid array (BGA) and a pin grid array (PGA) package.

The disclosed package type integrates BGA technology with PGA technology into one package.

              The three innermost BGA rows are converted to PGA-type pins (see Figure 3). As a result, routing becomes much simpler. The time to fan out the part is reduced because the designer does not have to drop vias for the three rows of pins. Many of the pins on the inner rows are power and ground nets, so the pins are already tapped to their corresponding plane. The three innermost pins also provide improved power and ground delivery to the chip.

              The conventional PGA part enables one bottom-side routing channel between the pins. The hybrid package doubles the bottom side routing channel.

              Depending on the ball-out of the chip, the hybrid chip could enable specific pins (power and ground) on the outer rows to become pins rather than pads.

Advantag...