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An IC Interconnect Capacitor with Optimal Lateral Flux Coupling and RF Performance.

IP.com Disclosure Number: IPCOM000010776D
Original Publication Date: 2003-Jan-20
Included in the Prior Art Database: 2003-Jan-20
Document File: 5 page(s) / 151K

Publishing Venue

Motorola

Related People

Yang Du: AUTHOR

Abstract

This report describes an IC interconnect fringing capacitor with optimal capacitance density and minimum self-inductive parasitic. Capacitive coupling is achieved by stacking metal slots and vias into vertical bars and placing them in close proximity. Such configuration allows optimal lateral flux coupling for any given technology. As an example, it was found that at 0.28um metal pitch of the 90nm technology node, a 2.2 fF/um^2 capacitance density could be achieved with a robust process latitude, i.e. satisfy metal area, pitch and via array rules. The capacitance density represents a minimum 35% increase in comparison to horizontal inter-digital finger (HIDF) configurations. The vertical fingers are connected in inter-digital form through a comb structure on the upper metal layer and making an alternate touch down onto the vertical fingers. The terminals are made such that the ac currents along the fingers are at opposite directions, canceling the magnetic flux generated by each finger and thus minimizing the parasitic self-inductance. Doing so, the resonant frequency is increased by 5x. In addition, with improved line definition at deep sub-um technology and a shorter length of vertical fingers, the capacitor is capable of delivering higher Q and better mismatch performances. In short, the proposed vertical finger interconnect capacitor is superior in many respects to linear capacitor performance within a wide frequency spectrum from DC to microwave. The capacitor is thus a prime candidate for switched capacitor designs and other RF and analog circuitries where a high performance linear capacitor is critical. Keywords: interconnect fringing capacitor; lateral flux coupling; parasitic self-inductance; resonant frequency; capacitor quality factor Q; linear capacitor; DC; microwave; switched capacitor; RF; analog.

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An IC Interconnect Capacitor with Optimal Lateral Flux Coupling and RF Performance.

Yang Du

Abstract

This report describes an IC interconnect fringing capacitor with optimal capacitance density and minimum self-inductive parasitic. Capacitive coupling is achieved by stacking metal slots and vias into vertical bars and placing them in close proximity. Such configuration allows optimal lateral flux coupling for any given technology. As an example, it was found that at 0.28um metal pitch of the 90nm technology node, a 2.2 fF/um^2 capacitance density could be achieved with a robust process latitude, i.e. satisfy metal area, pitch and via array rules. The capacitance density represents a minimum 35% increase in comparison to horizontal inter-digital finger (HIDF) configurations.

The vertical fingers are connected in inter-digital form through a comb structure on the upper metal layer and making an alternate touch down onto the vertical fingers. The terminals are made such that the ac currents along the fingers are at opposite directions, canceling the magnetic flux generated by each finger and thus minimizing the parasitic self-inductance. Doing so, the resonant frequency is increased by 5x. In addition, with improved line definition at deep sub-um technology and a shorter length of vertical fingers, the capacitor is capable of delivering higher Q and better mismatch performances. In short, the proposed vertical finger interconnect capacitor is superior in many respects to linear capacitor performance within a wide frequency spectrum from DC to microwave. The capacitor is thus a prime candidate for switched capacitor designs and other RF and analog circuitries where a high performance linear capacitor is critical.

Keywords:� interconnect fringing capacitor; lateral flux coupling; parasitic self-inductance; resonant frequency; capacitor quality factor Q; linear capacitor; DC; microwave; switched capacitor; RF; analog.

Background Information

As silicon technology marches into the deep sub-um arena, linear capacitors using backend interconnect have gained considerable attentions. Different capacitor designs, including horizontal inter-digital fingers (HIDF) [1,2], vertical parallel plates (VPP) [3], and fractal structures [4] were proposed in the past. To increase capacitive coupling, attention has been paid to the exploitation of the lateral flux-coupling component as interconnect rules shrink [3,4]. In addition, the approach of minimizing parasitic self-inductance was also explored for HIDF configuration [5]. These approaches, however, address only a portion of the total performance spectrum, namely, capacitance density or RF performance. A whole package of high density and good RF performance linear capacitors is yet to be described. In this report, an enabling method is proposed to construct vertical finger structures with optimal lateral flux coupling and minimum parasitic inductance using a novel terminal connection approach. The proposed capac...