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Method for universal hardware for flash multistack chip scale RPM products

IP.com Disclosure Number: IPCOM000010963D
Publication Date: 2003-Feb-05
Document File: 4 page(s) / 269K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for universal hardware for flash multistack chip scale rapid prototype-to-manufacturing (RPM) products. Benefits include improved functionality, improved reliability, and improved productivity.

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Method for universal hardware for flash multistack chip scale RPM products

Disclosed is a method for universal hardware for flash multistack chip scale rapid prototype-to-manufacturing (RPM) products. Benefits include improved functionality, improved reliability, and improved productivity.

Background

        � � � � � An RPM development team may be asked, for example, to test hardware within 1 week of a customer request for a specific multistacked flash product to able to generate quick-turn samples after rapid prototyping by both packaging design and product development laboratories. Typical test hardware is designed for a product type/build, which takes 6-10 weeks.

General description

        � � � � � The disclosed method is universal hardware for flash multistack chip scale RPM products. The method enables the testing and creation of electrical samples for a customer request for a stack chip scale package (SCSP) product within 1 week of the request. The disclosed method accommodates various flash SCSP products and package sizes.

        � � � � � The key elements of the method include:

•        � � � � SCSP-RPM universal hardware consists of 20 PCB layers using an epoxy resin/woven glass cloth material.

•        � � � � Dielectric impedance on a signal layer is constrained to 50 ohms +/-10% to match tester impedance.

•        � � � � All internal traces use ground planes as reference layers.

•        � � � � All traces are matched in length at 8.5 inches with a 5-mils width.

•        � � � � Each power-supply line has its own decoupling capacitors (0.1 µF and 0.01 µF)

•        � � � � The universal hardware is installed on a tester to provide hand-test engineering capability for multistack flash/static random access memory devices.

Advantages

        � � � � � The disclosed method provides advantages, including:

•        � � � � Improved functionality due to supporting rapid product development

•        � � � � Improved functionality due to supporting various flash products an...