Browse Prior Art Database

Inverted Die in SOIC Package for Improved EMC Performance

IP.com Disclosure Number: IPCOM000011601D
Original Publication Date: 2003-Mar-07
Included in the Prior Art Database: 2003-Mar-07
Document File: 4 page(s) / 890K

Publishing Venue

Motorola

Related People

Dragan Mladenovic: AUTHOR [+3]

Abstract

An electromagnetic compatible multi-chip inertial sensor product has been developed by creating a psuedo-Faraday shield around the silicon by inverting the leadframe and thus creating a “die down” structure. This packaging structure allows for the metal leadframe flag to act as the grounded surface on the topside of the package (backside of the die). A grounded metal trace can be added to the printed circuit board on the backside of the package (topside of the die) to complete the Faraday shield. EMC performance in excess of 350 V/m has been observed with the inverted leadframe structure, compared with EMC test results on non-inverted leadframe samples with the same die of only 50 V/m. The work has been performed on SOIC samples but could be extended to other types of packages.

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Inverted Die in SOIC Package for Improved EMC Performance

Dragan Mladenovic, Mike Chapman, and David J. Monk

·        Abstract

An electromagnetic compatible multi-chip inertial sensor product has been developed by creating a psuedo-Faraday shield around the silicon by inverting the leadframe and thus creating a “die down” structure.  This packaging structure allows for the metal leadframe flag to act as the grounded surface on the topside of the package (backside of the die).  A grounded metal trace can be added to the printed circuit board on the backside of the package (topside of the die) to complete the Faraday shield.  EMC performance in excess of 350 V/m has been observed with the inverted leadframe structure, compared with EMC test results on non-inverted leadframe samples with the same die of only 50 V/m.  The work has been performed on SOIC samples but could be extended to other types of packages.

·        Introduction

The inertial sensor product family from Motorola are two-chip devices that separate the microelectromechanical systems (MEMS) and complementary metal-oxide-semiconductor (CMOS) technology.  Figure 1 shows an example of this technology. 

Figure 1.             The Motorola 2-chip inertial sensor product family.  The chip on the left is the CMOS control ASIC and the chip on the right, with a wafer-bonded cap to protect the underlying MEMS structure, is the MEMS or sensor chip.

This configuration uses an acceleration-variable, capacitive sensor.  The output of the three-plate sensor or MEMS chip is a capacitive signal that is susceptible to electromagnetic interference.  Electromagnetic compatibility (EMC) results from this configuration of silicon and packaging are shown in Figure 2.  The industry benchmark for EMC performance is 200 V/m from dc to over 1 GHz range.  It is clear from Figure 2 that this configuration of sensor does not meet this benchmark.

Figure 2.             EMC performance for the Motorola 2-chip inertial sensor products that are shown in Figure 1.

·        Experimental

One successful method of minimizing susceptibility of EMC is to provide a Faraday shield around the sensor device.  A unique method of creating such a structure has been assembled and will be described in this paper.  Because the sensor and CMOS chips are both bonded to a metal flag, the backside of the die can be set to a fixed voltage to shield this part of the device.  However, the front side of the die, in a conventional package (Figure 1), is not shielded, as it is covered only by plastic. 


The method proposed in this paper is to flip the flag/silicon structu...