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Auxiliary DC Alignment for Carrier Feed Through Suppression

IP.com Disclosure Number: IPCOM000011630D
Original Publication Date: 2003-Mar-10
Included in the Prior Art Database: 2003-Mar-10
Document File: 4 page(s) / 50K

Publishing Venue

Motorola

Related People

Scott R. Anderson: AUTHOR

Abstract

In many of the transmitter architectures, the minimization of carrier feed through (CFT) has been an issue. CFT is usually a manifestation of DC offsets occurring within the transmitter. These DC offsets are traditionally trained out through the use of a training algorithm within the transmit IC, but this training cannot always account for all of the additive components that contribute to CFT. The most common of these is DC offsets in the baseband input to the IC, but it can also include LO leakage into the feedback path (in Cartesian Loop

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Auxiliary DC Alignment for Carrier Feed Through Suppression

By Scott R. Anderson
 
 

In many of the transmitter architectures, the minimization of carrier feed through (CFT) has been an issue.  CFT is usually a manifestation of DC offsets occurring within the transmitter.  These DC offsets are traditionally trained out through the use of a training algorithm within the transmit IC, but this training cannot always account for all of the additive components that contribute to CFT.  The most common of these is DC offsets in the baseband input to the IC, but it can also include LO leakage into the feedback path (in Cartesian Loop architectures).  Given these added error sources, a secondary DC alignment routine is often necessary to null the output CFT further in order to meet FCC, ETSI or other regulatory requirements.  In addition, minimizing the CFT reduces the overall distortion in the transmit waveform.  This secondary alignment is meant to supplement, not replace, the primary DC training that occurs in the transmit IC, and thus only takes place after the primary training occurs. 

In the current secondary alignment routines, a power detector is required and the transmitter modulation must be removed in order for the power detector to measure the carrier component.  This is not an optimal condition as it causes the need for an interruption in service to complete the alignment.  The power detector method is also subject to errors created by DC shifts in the active circuitry in the baseband sections.  Specifically speaking, the DC bias can shift between having modulation off, and modulation on due to loading and other factors affecting the active circuitry.  These DC shifts contribute directly to transmitter CFT and degrade distortion performance.  Therefore, it is optimal to align the DC while modulation is present, as that is the normal operating condition of the transmitter.  The

Auxiliary DC Alignment (ADCA) described in this article provides a method for very accurately nulling out the CFT while not requiring any interruption in the transmitted signal.  In addition, since the ADCA nulls out DC errors while modulation is on, it also nulls any DC shift that may occur in the active circuits when the modulation is applied.  In contrast, the current secondary alignment approach does not account for these DC shifts when modulation is present.

The ADCA is to be used in conjunction with the transmit ICs in use on many of the linear transmitters today.  However, it is general in nature and can be used with any similar IC if it meets a minimal set of requirements.  Specifically, each of the transmit ICs considered has a differential baseband output immediately before the upmixer/modulator (designated as BB_I+, BB_I-, BB_Q+, BB_Q- in Figure 1).  This output is a differential quadrature output with an I-channel and Q-channel differential pair.  The analog baseband signal at these pins is sent to the upmixer, which is the final block of the transmit IC.  D...