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Method for Configuring Bond Pad Order to Facilitate Simplified Substrate Routing

IP.com Disclosure Number: IPCOM000011729D
Publication Date: 2003-Mar-12
Document File: 4 page(s) / 80K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method that enables the order of pads to be configured on one or more devices during the assembly process. Benefits include a reduction in the overall cost of the package with a minimal cost increase to the silicon itself.

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Method for Configuring Bond Pad Order to Facilitate Simplified Substrate Routing

Disclosed is a method that enables the order of pads to be configured on one or more devices during the assembly process. Benefits include a reduction in the overall cost of the package with a minimal cost increase to the silicon itself.

Background

Currently, bond pad order is fixed in memory designs. In order to overcome issues surrounding routing signals to accommodate all die in the stack, redistribution layers (RDL’s) or multi-layer substrates are used; however, both of these solutions are relatively expensive.

General Description

The disclosed method includes a Pad Order (PO) pad, to enable the reconfiguring of the order of the pads on the silicon device (see Figure 1). One method for doing this is to use a pull-up resistor in silicon connected to the pad.  During power-up, the voltage on the PO pad is sensed and its level is stored in a logic latch. The result is a logic signal indicating whether or not the PO pad is grounded external to the silicon die. This signal is used as an input to multiplexers for each data, address and clock pad, allowing the signals associated with each pad to be configured accordingly. 

It is difficult to reconfigure the order of power supply and ground pads.  Therefore, these pads should be placed near the center of the edge of the die, such that routing for these signals is simplified. Furthermore, the interchange of address, data, and clock pads may be expensive.  Therefore, pads should be oriented such that address pads get reconfigured as other address pads, data to other data, and so on.  An example pad order is shown for clarity:

Pad Group

PO=GND

PO=Float

1

A0-An

An+1-Amax

2

D0-Dn

Dn+1-Dmax

3

C0-Cn

Cn+1-Cmax

4

V1

V1

5

V2

V2

6

GND

GND

7

GND

GND

8

Cn+1-Cmax

C0-Cn

9

Dn+1-Dmax

D0-Dn

10

An+1-Amax

A0-An

Ax = Address Pad

Cx = Clock Pad (CE, WE, CLK, etc)

Dx = Data Pad

Vx =...