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Method for MCM package designs with flip-chips and wire-bond chips

IP.com Disclosure Number: IPCOM000011844D
Publication Date: 2003-Mar-19
Document File: 6 page(s) / 132K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for multichip module (MCM) package designs with flip-chips and wire-bond (WB) chips. Benefits include improved functionality, improved thermal performance, and improved design flexibility.

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Method for MCM package designs with flip-chips and wire-bond chips

Disclosed is a method for multichip module (MCM) package designs with flip-chips and wire-bond (WB) chips. Benefits include improved functionality, improved thermal performance, and improved design flexibility.

Background

        � � � � � The trend of conventional packaging is to combine several Si devices into one package so that the motherboard space can be saved and the cost of package assembly can potentially be reduced. The second die is mounted on the same side of the substrate or mounted underneath the package substrate.

        � � � � � The MCM (same side) approach requires a larger package substrate and is more difficult to assemble. Mounting the second die below the package substrate results in a potential thermal issue. No space is available for mounting a heatsink to the bottom die. The airflow is insufficient between the package substrate and the motherboard to cool the bottom die. Additionally, the package substrate is not a good thermal conductor. The heat generated by the bottom die is not efficiently transferred through the substrate to the heatsink on the top of the package.

        � � � � � Conventionally, a Cu heat spreader is attached to the FCPGA package to enhance heat spreading (see Figure 1). A heatsink is attached on top of the heat spreader with thermal interface material to further dissipate the heat from the package to the ambient environment. The left-hand side shows the example of a single chip module (SCM), while the right-hand side shows the example of MCM. The die with higher power dissipation, such as a CPU, is mounted on the top of the package substrate.

        � � � � � The die with lower power dissipation, such as L2/L3 cache and chipset, is mounted below the package substrate. The heat dissipation of the bottom die becomes more difficult due to the low thermal conductivity of the packaged substrate (see Figure 2). The heat from the bottom die flows toward the top die, resulting in much higher junction temperature that impacts the electrical performance and package reliability.

General description

� � � � � The disclosed method is multichip module (MCM) package designs with flip-chips and wire-bond chips. The method includes several design variations:

•        � � � � Multiple flip-chip dice into the same package

•        � � � � Multiple flip-chip dice with the top die located at the center of package substrate and the bottom die at the location close to the package edge

•        � � � � Multiple flip-chip dice with the top die located at the center of package substrate and multiple dice mounted beneath the package substrate

•        � � � � Wire-bond chip directly attached to the Cu heat spreader

•        � � � � Wire-bond chip directly attached to the Cu heat spreader without the second tier and a wire-bond chip attached directly to the bottom side of the package substrate

•        � � � � Multiple sunroofs with multiple wire-bond chips directly attached to the Cu heat spreader

        � � � � � The M...