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Method and apparatus to arbitrate results from several execution units with different latencies in a micropocessor system

IP.com Disclosure Number: IPCOM000011910D
Original Publication Date: 2003-Mar-25
Included in the Prior Art Database: 2003-Mar-25
Document File: 2 page(s) / 58K

Publishing Venue

IBM

Abstract

In a microprocessor, an issue queue can issue one instruction per cycle to one of the three execution units. However, due to different in execution latency between the type of instructions in the execution units, two or more instructions can produce the results in the same cycle. In order to reduce the number of write ports to the Register File, the three execution units can share a single result bus. To prevent result data collision between the three execution units, a result bus arbitration scheme is required.

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  Method and apparatus to arbitrate results from several execution units with different latencies in a micropocessor system

To prevent data collision, an execution unit will block the issue queue from issuing any instruction for 1 cycle when the execution engine is ready to produce a result. This will allow the execution unit that is in the process of producing the result to gain total control of the result bus for 1 cycle. This can accomplish as described below:

(1) When an instruction is issued to an execution unit, a counter value is written into a latch. There will be 1 separate counter per execution unit. Each execution unit will use its own counter to block issuing of instructions to the other execution units (i.e an execution unit cannot block issuing of instruction to itself).
(2) The counter is winding down every clock cycle.
(3) At the appropriate cycle, the counter output is used to block issuing of instructions to the other execution units to guarantee that no other execution units can produce result in the same cycle as its own execution unit.
(4) The execution unit will then put its result on the result bus when the data is produced.

A dataflow for the embodiment is shown below in Figure 1:

Figure 1: Result Bus arbitration DataFlow

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Disclosed by International Business Machines Corporation

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