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Method for real-time hardware compression for high-bandwidth signal capture

IP.com Disclosure Number: IPCOM000011945D
Publication Date: 2003-Mar-26
Document File: 3 page(s) / 114K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for real-time hardware compression for high-bandwidth signal capture. Benefits include improved functionality, improved performance, and improved application design flexibility.

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Method for real-time hardware compression for high-bandwidth signal capture                                                         

                           

Disclosed is a method for real-time hardware compression for high-bandwidth signal capture. Benefits include improved functionality, improved performance, and improved application design flexibility.

Background

              Conventional signal capture/compression techniques primarily use idle cycle filtering, which has good results but stores signal traces ineffectively when simultaneously active signals are few in number.

              For example, several validation strategies require capture of a processor’s bus traces. However, capturing traces without compression requires a tremendous amount of data storage, requiring techniques like idle-cycle filtering to reduce the size of these traces. This, however, is still not efficient because, in most cases, the traces carry information that is sparsely populated among its constituent signals.

General description

              The disclosed method is real-time hardware compression for high-bandwidth signal capture. A hardware mechanism compresses and records signal traces in realtime. The method is applicable to any contained system where a requirement exists for high-bandwidth signal capture and storage. The method is extremely efficient when a low number of active signals in the vector are traced.

              For example, an implementation that utilizes the disclosed method parses the input signal trace and stores it in a highly compressed form. The application takes advantage of the sparsely populated nature of the input trace, significantly reducing the bandwidth requirements to the storage medium.

Advantages

              The disclosed method provides advantages, including:

•             Improved functionality due to the real-time hardware compression of signal groups

•             Improved performance due to the simplicity of the hardware design

•             Improved application design flexibility due to the simplicity of the hardware

•             Improved cost effectiveness due to requiring minimal resources

Detailed description

              The disclosed method is real-time hardware compression for high-bandwidth signal capture. An example illustrates the method. A half-matrix is n x n size for an n-bit wide control bus. A table is organized so that the data for the least active signals are arranged in the top rows. The data for the most active signals are placed in the bottom rows. The row numbers decrease from n – 1 to 0 from top to bottom. If Sn-1…S0 denotes the signals in the same order, a find-first-index (FFI) is searched for the first active signal from left to right, using binary manipulation:

FFI = Reverse {(S0…Sn-1) AND (2’s Complement of (S0…Sn-1)}

              If the FFI is row i, the representation guarantees that signals S n-1…Si+1 are all inactive and signal Si is active. Only the encoded value of FFI (a log2n-wide field called Sz) and the signal...