Browse Prior Art Database

Method to incorporate Register Rename with Issue Queue

IP.com Disclosure Number: IPCOM000011971D
Original Publication Date: 2003-Mar-27
Included in the Prior Art Database: 2003-Mar-27
Document File: 2 page(s) / 61K

Publishing Venue

IBM

Abstract

In today microprocessors, in order to achieve high performance, a register rename scheme is often used to facilitate a high degree of out-of-order execution of instructions. However, current register rename schemes required large chip area and highly complex logic to perform the desired function. This disclosure make use of a data buffer which incorporated with the Issue Queue can perform the same function as Register Rename but with much less complexity and smaller chip area.

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Method to incorporate Register Rename with Issue Queue

In this disclosure, the load data is written into a load buffer so that dependent floating point instruction can access its operand without waiting for the load data to be written into the Register File. The load float instruction is dispatched to both the load/store execution unit and the floating point issue queue (FPQ). The load/store unit will access the data cache and send the load data to the load buffer. The FPQ will hold the load instruction, issue it out, and move the load data from the load buffer to the Register File at completion time.

When the load instruction is dispatched to the FPQ, the load target field (RT) will be used to index into a Queue Pointer table (Qprt_Table). At accessed location, a queue pointer (Qptr) will be written in (Qprt = location in the FPQ where the load instruction is latched in). Turn Qptr_v=1 at accessed location to indicate that the load instruction is writing this target location.

When the load instruction is issued, the Qprt field assigned to this load is then used to index the load buffer. At accessed location, set W=0 to indicate that the data is not available for dependent instruction to use. Set C=0 to indicate that this load has not been completed. Write RT field to load buffer for use as an address to write the Register File upon completion of the load. When the execution unit is producing the data, the load data will be written into the load buffer using the Qptr field as and address; at the same location, set W=1 to indicate that the load result is now written in the load buffer to allow depende...