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Level-Shifting CML to CMOS Converter with Power Down Protection

IP.com Disclosure Number: IPCOM000012028D
Publication Date: 2003-Apr-02
Document File: 2 page(s) / 133K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method that protects the gates from oxide breaks during power down, and converts high voltage differential signal swings to a single-voltage level (required for CMOS signaling), without damaging the thin gate oxides of the transistors. Benefits include improved reliability during power down testing.

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Level-Shifting CML to CMOS Converter with Power Down Protection

Disclosed is a method that protects the gates from oxide breaks during power down, and converts high voltage differential signal swings to a single-voltage level (required for CMOS signaling), without damaging the thin gate oxides of the transistors. Benefits include improved reliability during power down testing.

Background

Currently, the state of the art uses transistor loads running at lower speeds from a single supply voltage.

General Description

The disclosed method uses a 5GHz differential to single-ended converter to protect the gates from oxide breaks during power down, and convert high voltage differential signal swings to a single voltage level without damaging the thin gate oxides of the transistors. Figure 1 shows the top level block view for the circuit.

The specific pin descriptions for the disclosed method are as follows:

·        Pos_sig_in/Neg_sig_in are differential input signals (running from a 1.8v supply, but in generic terms could be any differential signal voltage).

·        High supply in the chip is 1.8v (nominal), the Low supply is 1.2v, and Ground is the 0v reference potential.

·        PWR_DN1 and PWR_DN2 (represent any combination of control pins) can be implemented as a single signal, or two separate signals, depending on the device sizing of the internal circuits.�

·        Pos_sig_out is referenced to the Low_supply pin and Ground.� In this application, it is a single-ended CMOS (i.e. rail-to-rail) signa...