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Method for multiple parallel data streams by context switching

IP.com Disclosure Number: IPCOM000012030D
Publication Date: 2003-Apr-02
Document File: 2 page(s) / 106K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for multiple parallel data streams by context switching. Benefits include improved performance and improved development time.

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Method for multiple parallel data streams by context switching

Disclosed is a method for multiple parallel data streams by context switching. Benefits include improved performance and improved development time.

Description

        � � � � � The disclosed method consists of redesigning existing circuits that process a stream of digital data to enable them process multiple streams of data without duplicating the circuit. The data stream is stored in a set of data registers (see Figure 1). The content is input to a common random logic block, so the different data streams are processed in sequence within one single random logic block. This approach saves silicon surface area because random logic blocks for each data stream are not required. However, during synthesis, the random logic block must be implemented using a faster clock.

        � � � � � For example, four channels of data streams are multiplexed at the circuit entry stage. Each channel is stored in registers that are shifted by a clock that runs at 4X the clock rate that would be used for processing only one channel. The resulting data streams are demultiplexed at the output stage.

        � � � � � The most straightforward way to implement the disclosed method is to design the logic circuit for multiple streams. The design process may be time consuming, but the verification process is conventional.

        � � � � � Scripts may be written to automatically convert single-stream circuits to multiple streams at the resistor/transistor logic (RTL) leve...