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Method for a precision matching capacitor structure for use in dual-damascene copper processes

IP.com Disclosure Number: IPCOM000012203D
Publication Date: 2003-Apr-16
Document File: 4 page(s) / 195K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a precision matching capacitor structure for use in dual-damascene copper processes. Benefits include improved performance and improved yield.

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Method for a precision matching capacitor structure for use in dual-damascene copper processes

Disclosed is a method for a precision matching capacitor structure for use in dual-damascene copper processes. Benefits include improved performance and improved yield.

Background

        � � � � � Complementary metal oxide semiconductor (CMOS) integrated circuits intended for communications applications often contain analog-signal processing (ASP) elements. These functional blocks include analog-to-digital converters (ADCs), switched-capacitor (SC) filters and multiplying digital-to-analog converters (MDACs). These functional blocks typically have their precision limited by the matching of passive circuit elements, such as integrated capacitors. They generate accurate voltage levels, cancel offset errors in amplifiers and/or scale analog signals by using ratios of values. In these applications, the matching of the capacitors is more important than their absolute value. Of course, variations in the absolute capacitance value changes circuit performance. However, for the named circuit blocks, this variation is considered a second-order effect.

        � � � � � Conventionally, metal-insulator-metal (MIM), double-poly, or poly-over-diffusion capacitors that require extra processing steps were used to construct precision matching capacitors. These steps add cost to the product by requiring more masks and processing steps. These additional steps also increase cost by reducing yield. Improvements in lithography required to shrink the lateral critical dimension in deep-submicron processes have opened the door to alternative matching capacitor structures. However, dual-damascene polishing can lead to vertically uneven bottom plates that reduce the matching performance.

General description

        � � � � � The precision capacitor is a precision matching capacitor structure for use in dual-damascene copper processes. It consists of several identical metal layers, stacked on top of each other (see Figure 1). Often called a finger capacitor, this structure can be extended by increasing the number and length of the fingers. The bottom-plate is indicated in the figure by the shaded areas. The top plate is not shaded.

        � � � � � To reduce power consumption and noise in precision switched-capacitor circuits, the top-plate and bottom-plate parasitic capacitances must be minimized. The top-plate capacitance is reduced by minimizing its outer periphery by placing it inside the bottom-plate and tying the bottom-most fingers together. To minimize bottom-plate parasitic capacitance, the lowest plate is constructed from the second metal layer (metal 2) or higher. The bottom-plate is connected to every finger of the bottom-most metal layer. Using the bottom plate in this configuration reduces the effect of the copper polishing.

        � � � � � The disclosed structure is a low-cost precision matching capacitor that is insensitive to the...