Dismiss
InnovationQ will be updated on Sunday, Oct. 22, from 10am ET - noon. You may experience brief service interruptions during that time.
Browse Prior Art Database

AUTOMATIC DEVICE BOOST SELECTION

IP.com Disclosure Number: IPCOM000012280D
Original Publication Date: 2003-Apr-24
Included in the Prior Art Database: 2003-Apr-24
Document File: 2 page(s) / 43K

Publishing Venue

IBM

Abstract

The problem to fix is : in a microprocessor based system , how to enter into an over boost mode automatically.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 95% of the total text.

Page 1 of 2

AUTOMATIC DEVICE BOOST SELECTION

In a system based upon a microprocessor, to determine if it's activity is growing up, one acts on the power supply and the clock speed in order to increase the computing power


.

    As described on figure 1, a microprocessor has external RAM , ROM, and peripherals. When it is working normally, a lot of accesses can be seen from the microprocessor to those external devices , but when it is idle, the microprocessor accesses remain on the ROM in order to jump on current instructions. So, the idea of the solution is to count the number of external accesses and to subtract it to the number of fetches to the ROM.

    Figure 2, is a complete description of the invention: the RAM, Perif1 and Perif2 accesses are incrementing the counter , while the ROM accesses are incrementing it. When the value of the counter is less than 50 , its output decode is set to 0 and the clock selects the normal speed of the clock, but when the counter value is more than 50, the boost mode is detected , so the microprocessor clock is multiplied by two via a phase lock loop (PLL) and it's power supply value is increased by 3 %.

This process can increase temporarily and as long as needed the computing power of a system.

cs

RO M

RAM

cs

M icro p ro ce sso r

cs0cs 1

   cs2 cs3

Peri f 1

cs

cs

Peri f 2

FIGURE 1

1

Page 2 of 2

Power Supply

cs

ROM

RAM

cs

mult by

2

cs0

cs3

Microprocessor

cs1 cs2

osc

S E L

Perif 1

cs

cs

Perif 2

or

>50incCOUNTER dec

FIGURE 2

Disclosed by International...