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Method for optimal adhesion hole placement for improving differential signaling integrity

IP.com Disclosure Number: IPCOM000012440D
Publication Date: 2003-May-07
Document File: 2 page(s) / 41K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for optimal adhesion hole placement for improving differential signal integrity. Benefits include improved signal quality.

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Method for optimal adhesion hole placement for improving differential signaling integrity

Disclosed is a method for optimal adhesion hole placement for improving differential signal integrity. Benefits include improved signal quality.

Background

� � � � � Extra even-mode noise is introduced to high speed differential signaling when adhesion holes are added to a design for processing. For single-ended transmission lines on a package or board, adding adhesion holes increases the impedance mismatch, lengthens the return path, and increases the signal skews at the output terminal. For high-speed differential signaling design, trace, reference plane, and substrate, material symmetry is critical for filtering out common mode noises. However, adding an adhesion hole following current design rules unavoidably destroys the symmetry. Moreover, conventional packaging requires smaller hole pitches to increase package reliability while a high-frequency microprocessor requires larger hole pitches (see Figure 1). As processors gain power and frequency, this conflict is expected to become increasingly problematic.

� � � � � Conventionally, this problem is solved by increasing other design aspects to compensate for the noise introduced from adhesion holes.

Description

        � � � � � The disclosed method eliminates the noise introduced by unsymmetrical adhesion hole placement from adding extra adhesion holes to make the configuration symmetric across differential traces. In addition to the adhesio...